Displaying 2 results from an estimated 2 matches for "region_limit".
2013 Jun 04
0
[PATCH] nouveau: Load firmware for BSP/VP engines on NV84-NV96, NVA0
...nv_wo32(priv->gpu_fw, i * 4, priv->fw[i]);
> +
> + nv_wr32(device, 0x103cc0, priv->gpu_fw->addr >> 8); /* REGION_BASE */
> + nv_wr32(device, 0x103cc4, 0x1c); /* XT_REGION_SETUP */
> + nv_wr32(device, 0x103cc8, priv->gpu_fw->size >> 8); /* REGION_LIMIT */
> +
> + tmp = nv_rd32(device, 0x0);
> + nv_wr32(device, 0x103de0, tmp); /* SCRATCH_H2X */
> +
> + nv_wr32(device, 0x103ce8, 0xf); /* XT_REGION_SETUP */
> +
> + nv_wr32(device, 0x103c20, 0x3f); /* INTR */
> + nv_wr32(device, 0x103d84, 0x3f); /...
2013 Jun 03
4
[PATCH] nouveau: Load firmware for BSP/VP engines on NV84-NV96, NVA0
...; i < priv->fw_size / 4; i++)
+ nv_wo32(priv->gpu_fw, i * 4, priv->fw[i]);
+
+ nv_wr32(device, 0x103cc0, priv->gpu_fw->addr >> 8); /* REGION_BASE */
+ nv_wr32(device, 0x103cc4, 0x1c); /* XT_REGION_SETUP */
+ nv_wr32(device, 0x103cc8, priv->gpu_fw->size >> 8); /* REGION_LIMIT */
+
+ tmp = nv_rd32(device, 0x0);
+ nv_wr32(device, 0x103de0, tmp); /* SCRATCH_H2X */
+
+ nv_wr32(device, 0x103ce8, 0xf); /* XT_REGION_SETUP */
+
+ nv_wr32(device, 0x103c20, 0x3f); /* INTR */
+ nv_wr32(device, 0x103d84, 0x3f); /* INTR_EN */
+
+ return 0;
+}
+
+static int
+nv84_bsp_fini(struct nouv...