search for: reginfo

...pecific Registration Event package support (but I won't swear I searched the right way). How can I make sure this feature is supported or not ? More precisely, this Registration Event package support relies on these headers : SIP SUBSCRIBE "reg" Event SIP SUBSCRIBE "application/reginfo+xml" Accept SIP NOTIFY "reg" Event SIP NOTIFY "application/reginfo+xml" Content How shall I check ? Regards -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.digium.com/pipermail/asterisk-users/attachments/20070822/347dae77/attac...

.... > > Index: CodeGen/PrologEpilogInserter.cpp > =================================================================== > --- CodeGen/PrologEpilogInserter.cpp (revision 52829) > +++ CodeGen/PrologEpilogInserter.cpp (working copy) > @@ -464,7 +464,8 @@ > // works. > if (!RegInfo->targetHandlesStackFrameRounding() && > (FFI->hasCalls() || FFI->hasVarSizedObjects() || > - RegInfo->needsStackRealignment(Fn))) { > + (RegInfo->needsStackRealignment(Fn) && > + Offset > std::abs(TFI.getOffsetOfLocalArea())))...

...just stack alignment. Unfortunately > your patch doesn't make any difference. > > Thanks for thinking about this, > > Duncan. OK, the test is not quite right then. This doesn't happen on Darwin so I'm afraid you'll have to debug it. Perhaps testing for (RegInfo->needsStackRealignment(Fn) && FFI->getObjectIndexEnd()!=0) ? > On Friday 27 June 2008 19:51:00 Dale Johannesen wrote: >> On Jun 27, 2008, at 3:11 AMPDT, Duncan Sands wrote: >>> FAIL: test/CodeGen/X86/vec_shuffle-10.ll >>> Failed with exit(1) at lin...

Hi Dale, > OK, the test is not quite right then. This doesn't happen on Darwin > so I'm > afraid you'll have to debug it. Perhaps testing for > (RegInfo->needsStackRealignment(Fn) && > FFI->getObjectIndexEnd()!=0) > ? yes, that works - thanks! Since I have no idea what this is doing, is it ok if I leave it to you to commit it? Thanks again, Duncan. > > On Friday 27 June 2008 19:51:00 Dale Johannesen wrote: &g...

...you. It will be something close to this. Index: CodeGen/PrologEpilogInserter.cpp =================================================================== --- CodeGen/PrologEpilogInserter.cpp (revision 52829) +++ CodeGen/PrologEpilogInserter.cpp (working copy) @@ -464,7 +464,8 @@ // works. if (!RegInfo->targetHandlesStackFrameRounding() && (FFI->hasCalls() || FFI->hasVarSizedObjects() || - RegInfo->needsStackRealignment(Fn))) { + (RegInfo->needsStackRealignment(Fn) && + Offset > std::abs(TFI.getOffsetOfLocalArea())))) { // If we h...

Running on x86-64 linux: FAIL: test/CodeGen/X86/vec_ins_extract.ll Failed with exit(1) at line 1 while running: llvm-as < test/CodeGen/X86/vec_ins_extract.ll | opt -scalarrepl -instcombine | llc -march=x86 -mcpu=yonah | not grep sub.*esp subl $16, %esp subl $16, %esp subl $16, %esp subl $16, %esp child process exited abnormally FAIL:

...ed(RegUnused0); It works but there are two issues: 1) I need to registers and RegScavenger only returns one. 2) I cannot unset the used register and I get spill slot error message when I ran out of the available registers. So I gave up and tried createVirtualRegister(): MachineRegisterInfo &RegInfo = MBB.getParent()->getRegInfo(); const TargetRegisterClass *RC = &LASER::GNPRegsRegClass; unsigned Reg = RegInfo.createVirtualRegister(RC); But then I get the following error: MachineCopyPropagation.cpp:267: void anonymous}::MachineCopyPropagation::CopyPropagateBlock(llvm::MachineBasicBloc...

...when I want to move the formal argument from the specific register class to other register class. I implement it in LowerFormalArguments() like this: .... for (auto &VA : ArgLocs) { if (VA.isRegLoc()) { // Arguments passed in registers EVT RegVT = VA.getLocVT(); VReg = RegInfo.createVirtualRegister(&FOO::BRegsRegClass); RegInfo.addLiveIn(VA.getLocReg(), VReg); SDValue ArgIn = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); SDValue ArgIn_copy = DAG.getNode(FOOISD::MOVE_FLAG , dl, MVT::i32, Chain, ArgIn); // this node is added in order to move the value f...

All, I'm using Asterisk 1.6 and using Polycom 500's with SIP firmware 2.1.3. I can not seem to get the Message Waiting Indicator to work reliably (and in my opinion correctly) with voicemail. I've got the following in my phone.cfg: <reginfo> <msg msg.bypassInstantMessage="1"> <mwi msg.mwi.1.callBack="*97" msg.mwi.1.callBackMode="contact" msg.mwi.1.subscribe="" ></mwi> </reginfo> and the indicator will come on if there is a new message but it won't go off when I...

...alArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { MachineFunction &MF = DAG.getMachineFunction(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); assert(!isVarArg && "VarArg not supported"); // Assign locations to all of the incoming arguments. SmallVector<CCValAssign, 16> ArgLocs; CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, *DAG.getContext());...

...eFrameObjectOffsets method. It only aligns the stack if FFI->hasCalls() is true. The only place where MachineFrameInfo::setHasCalls is invoked is PEI::saveCallerSavedRegisters and the value 'true' is only passed when there are instructions with opcodes equal to either RegInfo->getCallFrameSetupOpcode() or RegInfo->getCallFrameDestroyOpcode(). I don't have such special opcode, so hasCalls returns false and the stack is not aligned. Any ideas? - Volodya

Looks good. + unsigned temp; + if (is64bit) + temp = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); + else + temp = RegInfo.createVirtualRegister(&PPC::G8RCRegClass); How about? const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : &PPC:G8RCRegClass; unsigned TmpReg = RegInfo.createVirtualRegister(RC); Evan On Jul 9,...

Hi Krzysztof, Thanks for your response. I was trying to map function input parameters to machine specific registers. My solution I found is based to the RegInfo.setSimpleHint() API. Here is the body of the parameters loop of TargetLowering::LowerFormalArguments VReg = RegInfo.createVirtualRegister(RC); RegInfo.setSimpleHint(VReg,CLP::FA_ROFF1+i); RegInfo.addLiveIn(CLP::FA_ROFF1+i, VReg); Load = DAG.getCopyFromReg(Chai...

...GPREL16/32 relocations. When we calculate such relocations we need to know _gp symbol's value. This value might come from different sources. Usually we setup it using constant offset from the .got section. Also it might be defined by a linker script. And in rare but possible case it comes from .reginfo / .MIPS.options sections. Got example, GNU bfd linker has the following code to adjust _gp-relative relocation addends: rel->r_addend += _bfd_get_gp_value (input_bfd); rel->r_addend -= _bfd_get_gp_value (output_bfd); But I think we can escape to implement the same adjustments in LLD if w...

...after some time I'm trying to build my code with the current CVS of LLVM, and have a problem. The mentioned file, around line 184, contains: if (FixedSlot == FixedSpillSlots+NumFixedSpillSlots) { // Nope, just spill it anywhere convenient. FrameIdx = FFI->CreateStackObject(RegInfo->getSpillSize(Reg)/8, RegInfo->getSpillAlignment(Reg)/8); } else { // Spill it to the stack where we must. FrameIdx = FFI->CreateFixedObject(RegInfo->getSpillSize(Reg)/8, FixedSlot->second...

...o, if possible, I would like to know if, besides the source code of the register allocation classes (which is very well commented, and very clean), if there is any online description of the register allocation interface. For instance, concerning register allocation: - To send registers to memory: RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC); - To bring registers from memory: RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC); - Given instruction i, virtual v, and machine reg m, allocate m to v at i: MI->SetMachineOperandReg(i, physReg); And PHI deconstructi...

...) block further down where setScavengingFrameIndex should have been set. As a result of it was not being set there, there was an assertion failure (ScavengingFrameIndex >= 0) and subsequent memory corruption in RegScavenger::scavengeRegister. I fixed this by performing the CanEliminateFrame and RegInfo->cannotEliminateFrame checks before the call to estimateRSSStackSizeLimit, since these values are available before BigStack is initialized. Does that sound reasonable? I've attached a patch with my change. Oh, I should mention that the previous version of LLVM we used, 2.6, didn't inclu...

.../docs/CodeGenerator.html Any contributions to make the documentation better are very welcome! The best way to learn stuff is to look for examples in the existing passes and by asking questions here. > For instance, concerning register allocation: > > - To send registers to memory: > RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC); > - To bring registers from memory: > RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC); > - Given instruction i, virtual v, and machine reg m, allocate m to v at i: > MI->SetMachineOperandReg(i, physReg); &gt...

...ion assumes NULL symbol. The most interesting case is the second relocation. It uses the special symbol value given by the r_ssym field. This field can contain four predefined values: * RSS_UNDEF - zero value * RSS_GP - value of gp symbol * RSS_GP0 - gp0 value taken from the .MIPS.options or .reginfo section * RSS_LOC - address of location being relocated So the problem is how to store these four constants in the lld::Reference object. The RSS_UNDEF is obviously not a problem. To represent the RSS_GP value I can set an AbsoluteAtom created for the "_gp" as the reference's targe...

Hello Alok, > I fixed this by performing the CanEliminateFrame and > RegInfo->cannotEliminateFrame checks before the call to > estimateRSSStackSizeLimit, since these values are available before BigStack > is initialized. Does that sound reasonable? I’ve attached a patch with my > change. Will you please provide a testcase which reproduces the problem? Thanks! -...