search for: regclassinfo

Displaying 4 results from an estimated 4 matches for "regclassinfo".

2011 Nov 30
2
[LLVMdev] Register allocation in two passes
...I != E; ++I) { unsigned VirtReg = I->first; if ((TargetRegisterInfo::isVirtualRegister(VirtReg)) && (VRM->getPhys(VirtReg) == REG_Y)) { LiveInterval &LI = LIS->getInterval(VirtReg); unassign(LI, REG_Y); enqueue(&LI); } } RegClassInfo.runOnMachineFunction(VRM->getMachineFunction()); // update reserve reglist So similar to what's done in LRE_WillShrinkVirtReg(), it searches for live intervals where REG_Y is allocated and evicts them for reallocation. I don't know if there's a faster way of doing this but it's...
2011 Nov 30
0
[LLVMdev] Register allocation in two passes
...= I->first; > if ((TargetRegisterInfo::isVirtualRegister(VirtReg)) > && (VRM->getPhys(VirtReg) == REG_Y)) > { > LiveInterval &LI = LIS->getInterval(VirtReg); > unassign(LI, REG_Y); > enqueue(&LI); > } > } > RegClassInfo.runOnMachineFunction(VRM->getMachineFunction()); // update reserve reglist > > So similar to what's done in LRE_WillShrinkVirtReg(), it searches for live intervals where REG_Y is allocated and evicts them for reallocation. I don't know if there's a faster way of doing this but...
2011 Nov 29
0
[LLVMdev] Register allocation in two passes
On Nov 29, 2011, at 10:24 AM, Borja Ferrer wrote: > Yes, I want the register to be allocatable when there are no stack frames used in the function so it can be used for other purposes. In fact, I looked at how other backends solve this problem, but they are all too conservative by always reserving the register which in my case it is not a good solution because of the performance impact of not
2011 Nov 29
2
[LLVMdev] Register allocation in two passes
Yes, I want the register to be allocatable when there are no stack frames used in the function so it can be used for other purposes. In fact, I looked at how other backends solve this problem, but they are all too conservative by always reserving the register which in my case it is not a good solution because of the performance impact of not having this register available. I find very interesting