Displaying 2 results from an estimated 2 matches for "regaltnameindex".
2015 Aug 31
2
MCRegisterClass mandatory vs preferred alignment?
On 08/31/2015 03:59 PM, Matthias Braun wrote:
> Looks to me like the alignment is specified in tablegen. From Target.td:
>
> class RegisterClass<string namespace, list<ValueType> regTypes, int alignment,
> dag regList, RegAltNameIndex idx = NoRegAltName>
>
> X86RegisterInfo.td:
>
> def VR256 : RegisterClass<"X86", [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
> 256, (sequence "YMM%u", 0, 15)>;
> def VR256X : RegisterClass<"X86", [v32i8, v16i16,...
2015 Aug 31
3
MCRegisterClass mandatory vs preferred alignment?
Looking around today, it appears that TargetRegisterClass and
MCRegisterClass only includes a single alignment. This is documented as
being the minimum legal alignment, but it appears to often be greater
than this in practice. For instance, on x86 the alignment of %ymm0 is
listed as 32, not 1. Does anyone know why this is?
Additionally, where are these alignments actually defined? I