Displaying 15 results from an estimated 15 matches for "regallocregistri".
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regallocregistry
2007 Jul 13
0
[LLVMdev] [PATCH] Re: Pluggable Register Coalescers
On Wednesday 11 July 2007 15:07, Christopher Lamb wrote:
> Could it be possible for there to be a harness type interface that
> would allow coalescers that support both modes to be hooked into the
> pass registration, and those that depend on the allocator not be
> registered as passes?
I have a patch for this kind of thing attached. Please take a look and let
me know if it looks
2007 Jul 11
3
[LLVMdev] Pluggable Register Coalescers
On Jul 11, 2007, at 11:39 AM, David Greene wrote:
> On Wednesday 11 July 2007 12:41, Tanya M. Lattner wrote:
>
>> I think the coalescer should be flexible enough to be run
>> independent of
>> the register allocator. For example, you may want to expose the
>> copies
>> induced by transforming out of SSA to the scheduler. If the
>> scheduler is
2008 Dec 20
0
[LLVMdev] A faster instruction selector?
> On Dec 17, 2008, at 4:53 AM, Mark Shannon wrote:
>> Choosing the fast selector does speed code-generation by almost
>> double,
>> when using llc, but the reduction in final code speed is obviously a
>> downside.
> [...]
>> Since my toolkit generates an interpreter, I am able to just compile
>> hotspots, so final speed of compiled code is quite
2012 Dec 27
0
[LLVMdev] About the MachinePassRegistry
Hi all,
The "Creating new registries" part on the "Writing An LLVM Pass" page
seems unclear.
I copied "llvm/CodeGen/RegAllocRegistry.h" to my project directory,
modify the class name and the FunctionPassCtor type, and add code in the
document to my "machinepass.cpp" file.
But the llc -help doesn't show anything about the registry.
Which part is
2016 Feb 26
0
Help Required llc runtime error for simple MachineFunctionPass
Hello ,
I have written a very simple MachineFunction Pass that currently does
nothing. It compiles fine but when I try to load it with llc it give me
following error:
llc -optimize-regalloc=0 -load lib/GCRA.dylib -regalloc=gc test/fibo.bc
Pass 'Bundle Machine CFG Edges' is not initialized.
Verify if there is a pass dependency cycle.
What is going wrong here ?
Here is my very simple
2006 Aug 03
0
[LLVMdev] Adding register allocator to LLVM
Welcome to the world of pluggable machine passes. This work was done
to lighten the load of some llvm tools, ie., only link in the
register allocators and instruction schedulers that are actually
needed in a particular circumstance. I guess I will have to write
this up, but generally it works like this.
In your register allocator .cpp file add the following include;
#include
2006 Aug 03
3
[LLVMdev] Adding register allocator to LLVM
Hi!
I'm developing a register allocator and need it to be available as an option
for llc tool. I used to edit /lib/CodeGen/Passes.cpp for this aim but after
yesterday's update these options are defined somewhere else and I can't find
the place.
Thanks for your help.
Tony.
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2008 Dec 17
1
[LLVMdev] A faster instruction selector?[MESSAGE NOT SCANNED]
Hi Nicolas and Dan,
Thanks for your replies.
I've been playing around with various setting, as you suggested.
> What version of LLVM are you using here?
I'm using 2.4
My original time ratios of reg-alloc to instruction selection (1:12)
referred to the local register allocator and the standard instruction
selector (all passes), not a sensible comparison, I realise.
> I did
2016 Oct 12
3
Dragon egg not recognizing Target ARM machine
Hello Team,
Good Morning!!
This is Vishnu Prasanth doing my master's thesis on improving llvm compiler
optimization.
Currently I am trying to build dragon egg and when I gave take, it is not
getting recognized for ARM machine.
Can you please help me with.
Below are the errors when I gave the below command inside dragon egg
directory
GCC=GCC_DIR/gcc
2010 Oct 01
2
[LLVMdev] CMake "sudo make install" & headers
Sorry for the rapid fire replies, but this configuration works for me:
install(DIRECTORY include/
DESTINATION include
# FILES_MATCHING
PATTERN "*.def"
PATTERN "*.h"
PATTERN "*.td"
PATTERN "*.inc"
PATTERN ".svn" EXCLUDE
)
install(DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/include/
DESTINATION include
# FILES_MATCHING
PATTERN
2010 Oct 01
0
[LLVMdev] CMake "sudo make install" & headers
On Thu, Sep 30, 2010 at 3:08 PM, Samuel Williams
<space.ship.traveller at gmail.com> wrote:
> Hi,
>
> I might just be doing something stupid, but when I do
>
> $ cmake -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-2.8 -DCMAKE_BUILD_TYPE=Release ..
> $ sudo make install
>
> I don't get the expected headers in
> /usr/local/llvm-2.8/include/llvm
>
> It is
2012 Nov 09
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Thanks Lang, we are making progress! I no longer get the failed
assertion, but the code I'm using for vregs that don't get allocated a
preg, and thus need to be spilled and re-loaded is causing assembler errors.
I suspect the problem is my code for allocating space in the stack, but
I don't know how to fix it.
I've attached a new version of the simple register-allocation
2010 Sep 30
6
[LLVMdev] CMake "sudo make install" & headers
Hi,
I might just be doing something stupid, but when I do
$ cmake -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-2.8 -DCMAKE_BUILD_TYPE=Release ..
$ sudo make install
I don't get the expected headers in
/usr/local/llvm-2.8/include/llvm
It is simply an empty directory.
What am I doing wrong? This is on Mac OS X, CMake 2.8+
Kind regards,
Samuel
2007 Apr 30
1
[LLVMdev] llvm-gcc build broken
I can't build llvm-gcc from working directories updated an hour
ago.
-Dave
/tools/llvm-tools/i686-pc-linux-gnu/bin/g++ -c -g -DENABLE_CHECKING
-DENABLE_ASSERT_CHECKING -DIN_GCC -W -Wall -Wwrite-strings -pedantic
-Wno-long-long -Wno-variadic-macros -fno-common -DHAVE_CONFIG_H
-Wno-unused -DTARGET_NAME=\"i686-pc-linux-gnu\" -DENABLE_LLVM
2012 Nov 08
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
In x86-64 the REX prefix must be used to access an extended register
(r8-r15 and their aliases), but cannot be used when accessing the high byte
of the ABCD regs (AH, BH, CH, DH). In your test case you have hardcoded
%vreg1 to R8B, and %vreg15 to AH, and the test case contains a copy between
these registers. The copy simultaneously must have a REX prefix, and cannot
have a REX prefix,