search for: regalloclinearscan

Hi all, A question for other regalloc hackers - is there any good reason why we're requiring RegisterCoalescer tranisitively in RegAllocLinearScan (via addRequiredTransitive) ? If there's no reason I'll switch it to a plain requirement (addRequired). It's not a big deal, but is a little cleaner. Cheers, Lang.

...ike: virtual_register = frame_pointer + offset [virtual_register] and then have 'virtual_register' allocated on next iteration of register allocator? Also, while RegAllocLocal and RegAllocSimple directly call storeRegToStackSlot, I would not found any calls to that method in RegAllocLinearScan. Am I missing something? - Volodya

...This is one approach. Another approach is to have to spiller scavange registers, which is the subject of this enhancement request: http://llvm.org/PR768 > Also, while RegAllocLocal and RegAllocSimple directly call > storeRegToStackSlot, I would not found any calls to that method in > RegAllocLinearScan. Am I missing something? RegAllocLinearScan just does register assignment, then the code in VirtRegMap.cpp (poorly named) actually takes the register assignment and inserts/optimizes the spill code. Depending on how severe this problem is for your target, I'd suggest just reserving a regis...

I will be removing RegAllocLinearScan and VirtRegRewriter from trunk shortly after we cut the 3.0 release branch. LLVM 3.0 will still ship with the linear scan register allocator, but the default will be the new greedy allocator. Linear scan can be enabled by passing '-regalloc=linearscan -join-physregs' to llc. RegAllocLin...

...Documents/hpcl/LLVM/obj-llvm-darcslocal/../llvm-darcslocal/llvm/include/llvm/Analysis/LoopInfo.h:433 #1 0x001ca99c in (anonymous namespace)::RA::assignRegOrStackSlotAtInterval (this=0x8b010f0, cur=0x8b34114) at /Users/mike/Documents/hpcl/LLVM/obj-llvm-darcslocal/../llvm-darcslocal/llvm/lib/CodeGen/RegAllocLinearScan.cpp:567 #2 0x001cca64 in (anonymous namespace)::RA::linearScan (this=0x8b010f0) at /Users/mike/Documents/hpcl/LLVM/obj-llvm-darcslocal/../llvm-darcslocal/llvm/lib/CodeGen/RegAllocLinearScan.cpp:276 #3 0x001cd328 in (anonymous namespace)::RA::runOnMachineFunction (this=0x8b010f0, fn=@0x8b122c0) at...

Hi, I'm having some problems cross-compiling from ppc (OS X) to x86 object files and to ia64, at all. I'd appreciate some advice as to whether or not I'm actually supposed to be able to do this, and what's wrong if so. Here's how I configured it: ../llvm-darcslocal/llvm/configure --with-llvmgccdir=$LLVMGCCDIR --prefix=$HOME/Documents/hpcl/LLVM/install The results work fine

...find it. We have the short and long versions of our paper here: http://compilers.cs.ucla.edu/fernando/projects/puzzles/ Our algorithm is polynomial time, and up to now, it is adding about 15% more to the total compilation time of LLVM. It does not iterate like the current implementation of RegAllocLinearScan (LN), and does not have to worry about conflicts between virtuals and physical registers, two things that bring the running time of RegAllocLinearScan down. I am not an expert in C++, but I think that with a careful implementation, it would even be possible to match the compilation time of LN....

...System.a when LLVM is natively built on Windows/Mingw, but there the link succeeds. So, is this a cross-compiler issue? OTOH, the build complains about this: /usr/lib/gcc/i586-mingw32msvc/4.2.1-sjlj/libstdc++.a(stubs.o):(.text+0x160): multiple definition of `_powf' ../../lib/libLLVMCodeGen.a(RegAllocLinearScan.cpp.obj):RegAllocLinearScan.cpp:(.text$powf[_powf]+0x0):first defined here Oh, and ld segfaults after spitting the errors: collect2: ld terminated with signal 11 [Segmentation fault] Hope someone who is used to cross-compile with MinGW can provide some suggestion. oscar at qcore:~/dev/llvm/ming...

The next problem I have is: llvm[2]: Linking Debug executable llc /usr/lib/gcc/i586-mingw32msvc/4.2.1-sjlj/libstdc++.a(stubs.o):(.text+0x160): multiple definition of `_powf' /home/foad/llvm/objdir-mingw/Debug/lib/libLLVMCodeGen.a(RegAllocLinearScan.o):/usr/lib/gcc/i586-mingw32msvc/4.2.1-sjlj/../../../../i586-mingw32msvc/include/math.h:576: first defined here collect2: ld returned 1 exit status math.h:576 says: __CRT_INLINE float __cdecl powf (float x, float y) {return (float) pow (x, y);} The definition of _powf in RegAllocLinearScan.o s...

...or is there a path I can follow > to fix it myself on my own installation ? The easy way to do it in your area is to replace all occurences of std::numeric_limits<float>::infinity() with HUGE_VAL. The only two files that use std::numeric_limits<float>::infinity() are lib/CodeGen/RegAllocLinearScan.cpp and lib/CodeGen/LiveIntervals.cpp. As for CVS, I am not sure this should be fixed because there is really no LLVM bug here :-) -- Alkis

...unsigned getInstructionIndex(MachineInstr* instr) const { > Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); > assert(it != mi2iMap_.end() && "Invalid instruction!"); > return it->second; > } Hello Vladimir, Can you checkout the latest RegAllocLinearScan and RegAllocIterativeScan versions and retry? I've checked a fix for something I commited last night which was giving me the same assertion failure. Thank you, -- Alkis

...> http://llvm.org/PR768 Can you given some references for this "scavange" thing? Google and ResearchIndex are silent on the topic. >> Also, while RegAllocLocal and RegAllocSimple directly call >> storeRegToStackSlot, I would not found any calls to that method in >> RegAllocLinearScan. Am I missing something? > > RegAllocLinearScan just does register assignment, then the code in > VirtRegMap.cpp (poorly named) actually takes the register assignment and > inserts/optimizes the spill code. Yea, now that you mention this I see the 'spiller_' member of linear s...

...1, reg_v is mapped to phys_v, and reg_2 is mapped to phys_2. Your final code will be like: load phys_v, x add phys_1 := phys_v, phys_2 In order to insert load/store instructions, you can use the VirtRegMap class. The spiller, that is implemented in VirtRegMap.cpp will do that. For an example, see RegAllocLinearscan.cpp. Another way is to insert the load/store instructions yourself. This is done in RegAllocLocal.cpp, for example. Best, Fernando

Hello, I'm getting an assertion in register allocator, specifically in LiveIntervalAnalysis.h, method LiveIntervals::getInstructionIndex: unsigned getInstructionIndex(MachineInstr* instr) const { Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); assert(it != mi2iMap_.end() && "Invalid instruction!"); return it->second; } The crash happens

Chris Lattner wrote: >I think that we should switch to C constants in this case. Can you try >#include <math.h> and use HUGE_VAL instead? > It works: [finna at coplin11 ~/test]$ cat tst.cpp #include <limits> #include <iostream> #include <math.h> int main() { std::cerr << std::numeric_limits<float>::infinity() << "\n"; std::cerr

...is mapped to > phys_2. Your final code will be like: > > load phys_v, x > add phys_1 := phys_v, phys_2 > > In order to insert load/store instructions, you can use the VirtRegMap > class. The spiller, that is implemented in VirtRegMap.cpp will do that. > For an example, see RegAllocLinearscan.cpp. Another way is to insert > the load/store instructions yourself. This is done in RegAllocLocal.cpp, > for example. By the by, I don't remember whether you are inserting spills yourself or not, but you really should try to not do that if you are. It's much better to have an inte...

...about all def-use occurrences. I also implemented the functionality for splitting a live interval at any place. Additionally, the logic for selecting an "optimal" splitting position is done according to Wimmer's paper. Classes that I changed were: LiveInterval, LiveIntervalAnalysis, RegAllocLinearScan. To avoid conflicts with recent changes by Evan, I did the modifications on my copies of these classes which I named WimmerLiveInterval, WimmerLiveIntervalAnalysis, WimmerRegAllocLinearScan. I'm currently working on documenting the code and adding comments as well as some refactoring to make...

...ions of our paper here: > > http://compilers.cs.ucla.edu/fernando/projects/puzzles/ > > Our algorithm is polynomial time, and up to now, it is adding > about > 15% more to the total compilation time of LLVM. It does not iterate > like > the current implementation of RegAllocLinearScan (LN), and does not > have > to worry about conflicts between virtuals and physical registers, two > things that bring the running time of RegAllocLinearScan down. I am > not an > expert in C++, but I think that with a careful implementation, it > would > even be possible...

...ometimes spill the whole live interval. So, I assign a stack slot to it. But LLVM requires also a physical register to be assigned to each such live interval as well. How do I decide which physical register should be taken? Why can't the local spiller or the former rewriteFunction() part of the RegAllocLinearScan find out on their own which of the currently available for allocation physical registers should be taken at a given point for a reload or for a spilling operation for a given spilled live interval? Wouldn't it be more convenient? You just say that the interval is spilled and the rest is done &q...

...int>(_FwdIt,_FwdIt,const unsigned int &)' being compiled with [ _FwdIt=std::_Vector_const_iterator<llvm::LiveRange,std::allocator<llvm::LiveRange>>, _Ty=llvm::LiveRange, _Alloc=std::allocator<llvm::LiveRange> ] RegAllocLinearScan.cpp c:\Program Files\Microsoft Visual Studio 8\VC\include\xutility(196) : error C2678: binary '<' : no operator found which takes a left-hand operand of type 'llvm::LiveRange' (or there is no acceptable conversion) c:\Program Files\Microsoft Visual Studio 8\VC\include\alg...