search for: reg_nodbg_empti

Displaying 14 results from an estimated 14 matches for "reg_nodbg_empti".

Did you mean: reg_nodbg_empty
2011 Feb 22
1
[LLVMdev] virtual register does not exist
Hi is there a way to know later that an earlier pass inside the codegen might have eliminated a virtual register. I carry information abt virtual registers which i would like to update if any virtual register does not exist since. thanks dz
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
On Wed, May 25, 2016 at 3:53 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > ------------------------------ > > *From: *"vivek pandya" <vivekvpandya at gmail.com> > *To: *"Quentin Colombet" <qcolombet at apple.com> > *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" <llvm-dev at lists.llvm.org>, >
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message ----- > From: "vivek pandya" <vivekvpandya at gmail.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "llvm-dev" <llvm-dev at lists.llvm.org>, "Matthias Braun" > <matze at braunis.de>, "Mehdi Amini" <mehdi.amini at apple.com>, "Quentin > Colombet" <qcolombet at
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
On Wed, May 25, 2016 at 8:44 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > ------------------------------ > > *From: *"vivek pandya" <vivekvpandya at gmail.com> > *To: *"Hal Finkel" <hfinkel at anl.gov> > *Cc: *"llvm-dev" <llvm-dev at lists.llvm.org>, "Matthias Braun" < > matze at braunis.de>, "Mehdi
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
Dear Mentors, Please help me to understand our plan to implement Interprocedural Register allocator by propogating register usage info. While writing this mail I am considering all previous discussion over llvm-dev and IRC. 1) A MachineFunction pass to be executed POST-RA to collect the information about the used Registers. 2) An Immutable pass which will store reg usage info collected by
2016 May 24
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message ----- > From: "vivek pandya" <vivekvpandya at gmail.com> > To: "Quentin Colombet" <qcolombet at apple.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" > <llvm-dev at lists.llvm.org>, "Matthias Braun" <matze at braunis.de>, > "Mehdi Amini" <mehdi.amini at
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Dear Mentors, > > Please help me to understand our plan to implement Interprocedural Register allocator by propogating register usage info. While writing this mail I am considering all previous discussion over llvm-dev and IRC. > > 1) A MachineFunction pass to be executed POST-RA to
2016 May 25
3
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote: > >> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote: >> >> Dear
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Dear Mentors, > > Please help me to understand our plan to implement Interprocedural > Register allocator by propogating register usage info. While writing this > mail I am considering all previous
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
Sent from my iPhone > On May 24, 2016, at 11:04 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > >> On Wed, May 25, 2016 at 10:46 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: >> >>> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: >>> >>> >>> >>> On Wed, May 25,
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
On Wed, May 25, 2016 at 10:46 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com> > wrote: > >> >> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote:
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message ----- > From: "Mehdi Amini" <mehdi.amini at apple.com> > To: "vivek pandya" <vivekvpandya at gmail.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" > <llvm-dev at lists.llvm.org>, "Matthias Braun" <matze at braunis.de>, > "Quentin Colombet" <qcolombet at
2016 May 24
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
Hello, I have written following code to check each register if it is used by machineFunction or not : MachineRegisterInfo *MRI = &MF.getRegInfo(); TargetRegisterInfo *TRI = (TargetRegisterInfo *)MF.getSubtarget().getRegisterInfo(); const TargetMachine &TM = MF.getTarget(); const MCRegisterInfo *MCRI = TM.getMCRegisterInfo(); DEBUG(dbgs() << "Function Name : " <<
2011 Feb 23
0
[LLVMdev] LLVMdev Digest, Vol 80, Issue 37-Help to unsubscribe
Please unsubscribe me from this list. Sujatha Gurumurthy Staffing Consultant/Talent Advisor UMG - Ultra Mobile Group sujatha.gurumurthy at intel.com US ERP Manager Interested in Employee Referral Program Visit referral.intel.com/ Intel USA Employee Referral Program Group 100 Best Companies to Work For 2011: Intel - INTC - from FORTUNE -----Original Message----- From: llvmdev-bounces at