search for: reg16392

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2010 Jul 28
3
[LLVMdev] Subregister coalescing
...erefore, vector loads are lowered to scalar loads followed by a chain of INSERT_VECTOR_ELTs. Then we select those to INSERT_SUBREG, everything fine to that point. Status before live analisys is (non-related instrs removed): 36 %reg16388<def> = LDWr %reg16384, 0; mem:LD4[<unknown>] 68 %reg16392<def> = INSERT_SUBREG %reg16392<undef>, %reg16388<kill>, 1 76 %reg16394<def> = LDWr %reg16386<kill>, 0; mem:LD4[<unknown>] 116 %reg16400<def> = MOVEV %reg16392<kill> 124 %reg16400<def> = INSERT_SUBREG %reg16400, %reg16394<kill>, 2 132 %reg1...
2010 Oct 29
1
[LLVMdev] [LLVMDev] Register Allocation and Kill Flags
...LLVM BB %entry %reg16385<def> = MOV32rm <fi#-2>, 1, %reg0, 0, %reg0; mem:LD4[FixedStack-2] GR32:%reg16385 %reg16384<def> = MOV32rm <fi#-1>, 1, %reg0, 0, %reg0; mem:LD4[FixedStack-1] GR32:%reg16384 %reg16388<def> = MOV32ri 1; GR32:%reg16388 %reg16392<def> = XOR32ri %reg16385, 4294967294, %EFLAGS<imp-def>; GR32:%reg16392,16385 %reg16391<def> = AND32rr *%reg16392<kill>*, %reg16384, %EFLAGS<imp-def>; GR32:%reg16391,16392,16384 %reg16389<def> = SHR32ri %reg16391, 1, %EFLAGS<imp-def>; GR32:%reg...
2010 Jul 28
0
[LLVMdev] Subregister coalescing
...o solve this? What Bob said. Use REG_SEQUENCE. You may have to use LLVM from Subversion to do that. Your machine code looks like you are using 2.7. > As an alternate approach, I also tried to do a custom InstrInserter that > ended with the correct code just after MI emission: > > 68 %reg16392<def> = LDWr %reg16384<kill>, 0; mem:LD4[<unknown>] > 76 %reg16393<def> = LDWr %reg16386<kill>, 0; mem:LD4[<unknown>] > 84 %reg16394<def> = LDWr %reg16387<kill>, 0; mem:LD4[<unknown>] > 92 %reg16395<def> = LDWr %reg16388<kill&gt...
2010 Nov 27
3
[LLVMdev] Register Pairing
...PR8:%reg16389 WDREGS:%reg16384 // EXTRACT HI BYTE OF A %reg16390<def> = COPY %reg16385:ssub_1; GPR8:%reg16390 WDREGS:%reg16385 // EXTRACT HI BYTE OF B %reg16391<def> = ADDRdRr %reg16388, %reg16387<kill>, %SREG<imp-def>; GPR8:%reg16391,16388,16387 // ADD LO BYTES %reg16392<def> = ADCRdRr %reg16390, %reg16389<kill>, %SREG<imp-def,dead>, %SREG<imp-use>; GPR8:%reg16392,16390,16389 // ADDC HI BYTES %reg16393<def> = REG_SEQUENCE %reg16391<kill>, ssub_0, %reg16392<kill>, ssub_1; WDREGS:%reg16393 GPR8:%reg16391,16392 // COMBINE...