Displaying 5 results from an estimated 5 matches for "refnod".
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2017 Oct 31
2
Reaching definitions on Machine IR post register allocation
...the immediately preceding def of R1,
> and that def is then linked to the preceding def of D0.
>
>
> Before I describe how to get the reaching defs from the graph, let me
> point out that there is a function "getAllReachingDefs" in
> RDFLiveness.cpp that for a given RefNode returns the vector of all
> reaching defs from the same block in the order in which they would be
> encountered going backwards from the RefNode to the beginning of the
> basic block. That function will only return defs from the same basic
> block as the RefNode is in. This functio...
2017 Nov 01
2
Reaching definitions on Machine IR post register allocation
...the immediately preceding def of R1,
> and that def is then linked to the preceding def of D0.
>
>
> Before I describe how to get the reaching defs from the graph, let me
> point out that there is a function "getAllReachingDefs" in
> RDFLiveness.cpp that for a given RefNode returns the vector of all
> reaching defs from the same block in the order in which they would be
> encountered going backwards from the RefNode to the beginning of the
> basic block. That function will only return defs from the same basic
> block as the RefNode is in. This functio...
2017 Nov 13
2
Reaching definitions on Machine IR post register allocation
...: Thu, Nov 2, 2017 at 1:34 AM
> Subject: Re: [llvm-dev] Reaching definitions on Machine IR post register
> allocation
> To: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
>
>
> RDF has its own tests to detect the ability to rename any given
> register. RefNodes that have "Fixed" flag are those where the register
> cannot be changed. Having the isRenamable flag in MachineOperand would
> help remove these tests.
>
> -Krzysztof
>
>
>
>
> On 10/31/2017 11:24 PM, Raghavan, Venugopal via llvm-dev wrote:
>
>...
2017 Sep 12
6
Reaching definitions on Machine IR post register allocation
Hi Venu,
> On Sep 11, 2017, at 11:00 PM, Raghavan, Venugopal via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi Krzysztof,
>
> Thanks for your reply.
>
> I agree that adding extra register units for x86 would be the right way to fix this. Do you know if there is a plan to fix this?
No concrete plan, no. We've been thinking about for quite some time now, but
2017 Nov 24
2
Reaching definitions on Machine IR post register allocation
...Re: [llvm-dev] Reaching definitions on Machine IR post register
>>> allocation
>>> To: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
>>>
>>>
>>> RDF has its own tests to detect the ability to rename any given
>>> register. RefNodes that have "Fixed" flag are those where the register
>>> cannot be changed. Having the isRenamable flag in MachineOperand would help
>>> remove these tests.
>>>
>>> -Krzysztof
>>>
>>>
>>>
>>>
>>> On 10/31/20...