Displaying 4 results from an estimated 4 matches for "reduceloopcount".
2019 May 10
2
[Pipeliner] MachinePipeliner TargetInstrInfo hooks need more information?
...into our VLIW
backend, and so far we've managed to get it working with some nice
speedups.
Unlike Hexagon however, our backend doesn't generate hardware loop
instructions and so all our loops are a combination of induction
variables, comparisons and branches. So when it came to implementing
reduceLoopCount for our TargetInstrInfo, we found that we didn't have
enough information from analyzeLoop to reduce the loops.
Currently the signatures look like this:
bool analyzeLoop(MachineLoop &L, MachineInstr *&IndVarInst,
MachineInstr *&CmpInst)
unsigned TargetIn...
2019 Jul 15
2
MachinePipeliner refactoring
...factor this from scratch. I'm therefore
looking for direction in factoring in an incremental fashion.
I think there are a couple of areas that I'd like to change, and I'd
appreciate your ideas and opinions because I clearly don't know enough
about the edge cases here.
a) TII->reduceLoopCount() is hard to understand. Understanding the
intended semantics of this hook from the documentation, I've found, is
hard. Its use appears to be strongly fit to Hexagon (there is even a
comment about the removal of LOOP0 in the MachinePipeliner target agnostic
code, which really shouldn't be t...
2019 Jul 15
1
MachinePipeliner refactoring
...factor this from scratch. I'm therefore
looking for direction in factoring in an incremental fashion.
I think there are a couple of areas that I'd like to change, and I'd
appreciate your ideas and opinions because I clearly don't know enough
about the edge cases here.
a) TII->reduceLoopCount() is hard to understand. Understanding the
intended semantics of this hook from the documentation, I've found, is
hard. Its use appears to be strongly fit to Hexagon (there is even a
comment about the removal of LOOP0 in the MachinePipeliner target agnostic
code, which really shouldn't be t...
2019 Jul 16
2
MachinePipeliner refactoring
...ends with a conditional jump to Epilog 1):
Y
X
Kernel:
Z, Y, X
Epilog 0:
Z
Epilog 1:
Y
Z
The instructions in the prolog and epilog are generate in original program order within each stage, but in the last epilog stage, the instruction Y generates a value used by the subsequent Z.
The reduceLoopCount function is needed for an architecture that has a hardware loop instruction like Hexagon’s LOOP0. For each prolog generated, the loop counter in the instruction needs to be decremented. This could have been done only in the last prolog block, but it’s done every time a prolog block is generated in...