Displaying 1 result from an estimated 1 matches for "reducebuildvectoshuffle____".
2018 Apr 09
1
llvm-dev Digest, Vol 166, Issue 22
Hi Krzysztof,
Sure, please see below. DAG.dump.() before and after, annotated with what I
believe the DAG means.
I've spent some time debugging the method but it's proving difficult to
determine where the logic is misfiring. Disabling the entire combine causes
a lot of failing x86-64 tests - I may have to learn an upstream vector ISA
to make progress on this.
Thank you
>From your