Displaying 6 results from an estimated 6 matches for "readwriteargmem".
2015 Jun 18
3
[LLVMdev] Attribute to mark that function only access memory through it's arguments
Hi,
Currently in AliasAnalysis we can model ModRef behaviour for functions which
only access memory through their pointer arguments. However we can't
express this propery as a function attribute.
For example, for intrinsics we can specify ReadWriteArgMem or ReadArgMem
attributes in tablegen definitions. But due to the lack of the related function
attributes on the llvm ir level, this intrinsics would be modelled as if they
were clobbering arbitrary memory.
It feels very naturall to add new function attribute which can cover such cases.
I have a p...
2015 Jun 19
2
[LLVMdev] Attribute to mark that function only access memory through it's arguments
...rote:
>
> Currently in AliasAnalysis we can model ModRef behaviour for
> functions which
> only access memory through their pointer arguments. However we can't
> express this propery as a function attribute.
>
> For example, for intrinsics we can specify ReadWriteArgMem or
> ReadArgMem
> attributes in tablegen definitions. But due to the lack of the
> related function
> attributes on the llvm ir level, this intrinsics would be modelled
> as if they
> were clobbering arbitrary memory.
>
> It feels very naturall to...
2016 Mar 19
4
New intrinsic property IntrOnlyWrite
...n't
operate on pointers. The codegen backend understands these perfectly
well as stores, and so we can enable better scheduling decisions than if
we forced these instruction to hasSideEffects.
In a perfect world, we'd be able to model the behavior of these load and
store intrinsics via ReadWriteArgMem, but that would require massive
changes in how LLVM thinks about memory locations and how to describe them.
This comparatively minor addition allows us to move forward with decent
scheduling in codegen for the time being.
Cheers,
Nicolai
2016 Mar 21
3
New intrinsic property IntrOnlyWrite
...s, and so we can enable better scheduling
>> decisions than if we forced these instruction to hasSideEffects.
> Can you give a bit more detail here? Example, etc..?
>>
>> In a perfect world, we'd be able to model the behavior of these load
>> and store intrinsics via ReadWriteArgMem, but that would require
>> massive changes in how LLVM thinks about memory locations and how to
>> describe them.
> This comments makes me think you might have a much deeper problem. Let's
> see an actual example first though; I might just be misreading your intent.
>>
&...
2011 Nov 30
2
[LLVMdev] Write-only intrinsics
Is there a reason that we don't have a definition for write-only
intrinsics? Specifically, utils/TableGen/CodeGenIntrinsics.h contains:
// Memory mod/ref behavior of this intrinsic.
enum {
NoMem, ReadArgMem, ReadMem, ReadWriteArgMem, ReadWriteMem
} ModRef;
The problem with this seems to be that "store" instructions, like the
PPC STVX instruction, that are primarily defined by an intrinsic
(int_ppc_altivec_stvx for the STVX instruction) get tagged as "mayLoad"
even though they don't load anything. T...
2016 Mar 22
0
New intrinsic property IntrOnlyWrite
...ble better scheduling
>>> decisions than if we forced these instruction to hasSideEffects.
>> Can you give a bit more detail here? Example, etc..?
>>>
>>> In a perfect world, we'd be able to model the behavior of these load
>>> and store intrinsics via ReadWriteArgMem, but that would require
>>> massive changes in how LLVM thinks about memory locations and how to
>>> describe them.
>> This comments makes me think you might have a much deeper problem. Let's
>> see an actual example first though; I might just be misreading your
&...