Displaying 19 results from an estimated 19 matches for "readcyclecounter".
2015 Dec 01
10
[RFC] Intrinsic naming convention (words with dots)
...ional prefix 'llvm.dbg.', 'llvm.eh.', 'llvm.experimental.', etc., but after that we lose consistency. When there is just a single word (or acronym) everything is fine, but the way we join multiple words (or acronyms) falls into three categories:
1. No separator (e.g. @llvm.readcyclecounter)
2. Using '.' as a separator (e.g. @llvm.sadd.with.overflow)
3. Using '_' as a separator (e.g. @llvm.read_register)
I propose that we standardize on (2) -- words with dots -- as it seems to have a plurality of more-recent intrinsics (and I think it is easy to read, as is (3)). Th...
2015 Nov 19
2
Get timestamp and processor ID in the IR
...R?
Best,
Zhi
On Thu, Nov 19, 2015 at 1:33 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> Hi Zhi,
>
> There is no standard (architecture-independent) way to get the processor
> id. We do have an intrinsic to get the cycle counter:
>
> http://llvm.org/docs/LangRef.html#llvm-readcyclecounter-intrinsic
>
> -Hal
>
> ----- Original Message -----
> > From: "zhi chen via llvm-dev" <llvm-dev at lists.llvm.org>
> > To: llvm-dev at lists.llvm.org
> > Sent: Thursday, November 19, 2015 3:29:40 PM
> > Subject: [llvm-dev] Get timestamp and proce...
2008 Jun 10
3
[LLVMdev] LangRef
The LangRef page is missing a bunch of stuff, including documentation
for all the LLVM instructions.
The page ruins dorectory from Vector Types to llvm.readcyclecounter.
Everything in-between is missing.
-Dave
2008 Jun 15
4
[LLVMdev] API to retrieve current time.
What's the API to retrieve current time of day in llc?
I need to use this to generate an unique number every time llc runs.
TIA
- Sanjiv
2008 Jun 15
0
[LLVMdev] API to retrieve current time.
> What's the API to retrieve current time of day in llc?
> I need to use this to generate an unique number every time llc runs.
The llvm.readcyclecounter might suit your needs:
http://www.llvm.org/docs/LangRef.html#int_readcyclecounter
Regards,
-Mahadevan.
2015 Nov 19
2
Get timestamp and processor ID in the IR
Hi,
I am wondering if it is possible to get the time-stamp and the processor ID
where an instruction is exectued in the IR? Thanks for your help in
advance:)
Best,
Zhi
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151119/dbbafb32/attachment.html>
2015 Nov 19
2
Get timestamp and processor ID in the IR
...< hfinkel at anl.gov >
> > wrote:
> >
> >
> > Hi Zhi,
> >
> > There is no standard (architecture-independent) way to get the
> > processor id. We do have an intrinsic to get the cycle counter:
> >
> > http://llvm.org/docs/LangRef.html#llvm-readcyclecounter-intrinsic
> >
> > -Hal
> >
> >
> >
> > ----- Original Message -----
> > > From: "zhi chen via llvm-dev" < llvm-dev at lists.llvm.org >
> > > To: llvm-dev at lists.llvm.org
> > > Sent: Thursday, November 19, 2015 3:29:40...
2008 Oct 31
2
[LLVMdev] Optimizations and debug info
...in optimized code:
Hey, your program crashed somewhere in function foo in foo.o
vs.
Hey, your program crashed in function foo in region foo1.c:100 - foo1.c:120
Also preserving debug info about variable names can be useful.
http://nondot.org/sabre/LLVMNotes/EmbeddedMetadata.txt
> For llvm.readcyclecounter, I think it's fine to inhibit
> optimizations. It's hard to understand what it means if it
> doesn't :-). Do you have an example where being able to
> do optimizations would be useful?
>
> Dan
>
I don't have a real example for the readcycles, but I could think...
2008 Nov 03
0
[LLVMdev] Optimizations and debug info
...em attribute time samples to
source lines (even if inherently fuzzy).
> Also preserving debug info about variable names can be useful.
>
> http://nondot.org/sabre/LLVMNotes/EmbeddedMetadata.txt
See also:
http://nondot.org/sabre/LLVMNotes/DebugInfoImprovements.txt
:)
>> For llvm.readcyclecounter, I think it's fine to inhibit
>> optimizations. It's hard to understand what it means if it
>> doesn't :-). Do you have an example where being able to
>> do optimizations would be useful?
>>
> I don't have a real example for the readcycles, but I could thi...
2008 Jun 10
0
[LLVMdev] LangRef
....
You are talking about this page, right?
http://llvm.org/docs/LangRef.html
-Tanya
On Tue, 10 Jun 2008, David Greene wrote:
> The LangRef page is missing a bunch of stuff, including documentation
> for all the LLVM instructions.
>
> The page ruins dorectory from Vector Types to llvm.readcyclecounter.
> Everything in-between is missing.
>
> -Dave
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listi...
2006 Apr 20
0
[LLVMdev] First draft of release notes done
...several items from the original DRAFT email of the
release notes are not in this document. Perhaps its just a matter of
time or these were intentional omissions, or the wording changed so I
didn't recognize it. But I thought I should point them out:
* Andrew added support for a new LLVM "readcyclecounter" intrinsic, for
accessing low-level target timing interfaces.
* LLVM now supports llvm.stacksave/llvm.stackrestore intrinsics, for
proper C99 Variable Length Array support.
* Nate reimplemented post-dominator analysis using the Lengauer and
Tarjan algorithm, replacing the old iterative i...
2006 Apr 19
4
[LLVMdev] First draft of release notes done
Please take a look:
http://llvm.org/docs/ReleaseNotes.html
-Chris
--
http://nondot.org/sabre/
http://llvm.org/
2008 Nov 03
2
[LLVMdev] Optimizations and debug info
...erving debug info about variable names can be useful.
>>
>> http://nondot.org/sabre/LLVMNotes/EmbeddedMetadata.txt
>>
>
> See also:
> http://nondot.org/sabre/LLVMNotes/DebugInfoImprovements.txt
>
> :)
>
>
Thanks for the pointer.
>>> For llvm.readcyclecounter, I think it's fine to inhibit
>>> optimizations. It's hard to understand what it means if it
>>> doesn't :-). Do you have an example where being able to
>>> do optimizations would be useful?
>>>
>>>
>> I don't have a real exa...
2006 Apr 14
2
[LLVMdev] [DRAFT] LLVM 1.7 release announcement notes [DRAFT]
...s generated from it.
* Reid contributed flexible support for "autoupgrading" intrinsics. This
is useful when we decide to change an intrinsic in a new releases of
LLVM: .ll and .bc files from old releases get upgraded to the new form. *
Andrew added support for a new LLVM "readcyclecounter" intrinsic, for
accessing low-level target timing interfaces.
* LLVM now supports llvm.stacksave/llvm.stackrestore intrinsics, for
proper C99 Variable Length Array support.
* Reid changed many intrinsics to have fixed types instead of being
overloaded based on type.
Mid-Level A...
2006 Apr 20
0
[LLVMdev] [DRAFT] LLVM 1.7 release announcement notes [DRAFT]
...ible support for "autoupgrading" intrinsics. This
> is useful when we decide to change an intrinsic in a new releases of
> LLVM: .ll and .bc files from old releases get upgraded to the new
> form.*
<new line> before *
> Andrew added support for a new LLVM "readcyclecounter" intrinsic, for
> accessing low-level target timing interfaces.
> * LLVM now supports llvm.stacksave/llvm.stackrestore intrinsics, for
> proper C99 Variable Length Array support.
> * Reid changed many intrinsics to have fixed types instead of being
> overloaded based on...
2006 Apr 20
0
LLVM 1.7 Release!
...d from it.
7. Reid contributed flexible support for "autoupgrading" intrinsics. This
is useful when we decide to change an intrinsic in a new releases of
LLVM: .ll and .bc files from old releases get upgraded to the new
form.
8. Andrew added support for a new LLVM "readcyclecounter" intrinsic, for
accessing low-level target timing interfaces.
9. LLVM now supports llvm.stacksave/llvm.stackrestore intrinsics, for
proper C99 Variable Length Array support.
10. Reid changed many intrinsics to have fixed types instead of being
overloaded based on type.
Mid-L...
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...To(VT0) == VT) {
- ExpandOp(Node->getOperand(0), Lo, Hi);
- break;
- }
-
- // Turn this into a load/store pair by default.
- if (Tmp.getNode() == 0)
- Tmp = EmitStackConvert(Node->getOperand(0), VT, VT, dl);
-
- ExpandOp(Tmp, Lo, Hi);
- break;
- }
-
- case ISD::READCYCLECOUNTER: {
- assert(TLI.getOperationAction(ISD::READCYCLECOUNTER, VT) ==
- TargetLowering::Custom &&
- "Must custom expand ReadCycleCounter");
- SDValue Tmp = TLI.LowerOperation(Op, DAG);
- assert(Tmp.getNode() && "Node must be custom expand...