Displaying 14 results from an estimated 14 matches for "read_pll".
2017 Sep 06
2
[PATCH] [RESEND] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
gcc thinks that interpreting a multiplication result as a bool
is confusing:
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c: In function 'read_pll':
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c:133:8: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context]
In this instance, I think using multiplication is more intuitive
than '&&', so I'm adding a comparison to zero...
2017 Sep 06
0
[PATCH] [v2] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
gcc thinks that interpreting a multiplication result as a bool
is confusing:
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c: In function 'read_pll':
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c:133:8: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context]
Adding a temporary variable to contain the divisor helps make
it clear what is going on and avoids that warning.
Fixes: 7632b30e4b...
2018 Jan 16
0
[PATCH] [RESEND v2] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
gcc thinks that interpreting a multiplication result as a bool
is confusing:
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c: In function 'read_pll':
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c:133:8: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context]
Adding a temporary variable to contain the divisor helps make
it clear what is going on and avoids that warning.
Fixes: 7632b30e4b...
2017 Jul 14
0
[PATCH 12/14] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
gcc thinks that interpreting a multiplication result as a bool
is confusing:
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c: In function 'read_pll':
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c:133:8: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context]
In this instance, I think using multiplication is more intuitive
than '&&', so I'm adding a comparison to zero...
2017 Sep 06
0
[PATCH] [RESEND] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
On Wed, Sep 6, 2017 at 3:56 PM, Arnd Bergmann <arnd at arndb.de> wrote:
> gcc thinks that interpreting a multiplication result as a bool
> is confusing:
>
> drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c: In function 'read_pll':
> drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c:133:8: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context]
>
> In this instance, I think using multiplication is more intuitive
> than '&&', so I'm adding a...
2013 Nov 16
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...h>
+#include <subdev/bios.h>
+#include <subdev/bios/pll.h>
+#include <subdev/timer.h>
+
+#include "nv50.h"
+#include "nvaa.h"
+#include "pll.h"
+
+static u32
+read_div(struct nouveau_clock *clk)
+{
+ return nv_rd32(clk, 0x004600);
+}
+
+static u32
+read_pll(struct nouveau_clock *clk, u32 base)
+{
+ u32 ctrl = nv_rd32(clk, base + 0);
+ u32 coef = nv_rd32(clk, base + 4);
+ u32 ref = clk->read(clk, nv_clk_src_href);
+ u32 post_div = 0;
+ u32 clock = 0;
+ int N1, M1;
+
+ switch (base){
+ case 0x4020:
+ post_div = 1 << ((nv_rd32(clk, 0x4070) &...
2013 Nov 17
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...h>
+#include <subdev/bios.h>
+#include <subdev/bios/pll.h>
+#include <subdev/timer.h>
+
+#include "nv50.h"
+#include "nvaa.h"
+#include "pll.h"
+
+static u32
+read_div(struct nouveau_clock *clk)
+{
+ return nv_rd32(clk, 0x004600);
+}
+
+static u32
+read_pll(struct nouveau_clock *clk, u32 base)
+{
+ u32 ctrl = nv_rd32(clk, base + 0);
+ u32 coef = nv_rd32(clk, base + 4);
+ u32 ref = clk->read(clk, nv_clk_src_href);
+ u32 post_div = 0;
+ u32 clock = 0;
+ int N1, M1;
+
+ switch (base){
+ case 0x4020:
+ post_div = 1 << ((nv_rd32(clk, 0x4070) &...
2014 Aug 21
9
NVA3 clock tree improvements
Following a series of patches to improve nouveaus clock tree parsing. Reclocking these engines (all but memory) is pretty stable on the cards I've tested. Please review and merge when approved.
These patches do not solve the problem that core/shader engine doesn't like to be clocked up too far without fb following, with visible corruption as a result. I suspect this problem is unrelated
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to
2013 Dec 06
2
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
...here
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:488:1: error: redefinition of 'read_div'
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:43:1: note: previous definition of 'read_div' was here
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:494:1: error: redefinition of 'read_pll'
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:49:1: note: previous definition of 'read_pll' was here
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:525:1: error: redefinition of 'nvaa_clock_read'
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:80:1: note: previous definit...
2013 Dec 06
0
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
...ers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:488:1: error: redefinition of 'read_div'
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:43:1: note: previous definition of 'read_div' was here
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:494:1: error: redefinition of 'read_pll'
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:49:1: note: previous definition of 'read_pll' was here
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:525:1: error: redefinition of 'nvaa_clock_read'
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:80:1: note: p...
2013 Dec 06
2
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
Hello everyone,
the current git HEAD of Linus Torvalds tree breaks Nouveau on my Mac Mini
Model 2010. I get variation of the following kernel panic when booting.
(gateway) [~] nc -u -l -p 6666
[ 3.796018] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 3.796100] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
[ 3.796304] ata1.00: ATA-7: INTEL SSDSA2M160G2GC, 2CV102HA, max
2020 Oct 17
10
[RFC] treewide: cleanup unreachable breaks
...ers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c
index efa50274df97..4884eb4a9221 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c
@@ -138,21 +138,18 @@ mcp77_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
case 0x00000030: return read_pll(clk, 0x004020) >> P;
}
break;
case nv_clk_src_mem:
return 0;
- break;
case nv_clk_src_vdec:
P = (read_div(clk) & 0x00000700) >> 8;
switch (mast & 0x00400000) {
case 0x00400000:
return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
-...
2020 Oct 17
10
[RFC] treewide: cleanup unreachable breaks
...ers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c
index efa50274df97..4884eb4a9221 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c
@@ -138,21 +138,18 @@ mcp77_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
case 0x00000030: return read_pll(clk, 0x004020) >> P;
}
break;
case nv_clk_src_mem:
return 0;
- break;
case nv_clk_src_vdec:
P = (read_div(clk) & 0x00000700) >> 8;
switch (mast & 0x00400000) {
case 0x00400000:
return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
-...