search for: rdmsrl

1: correct LDT checks 2: add address validity check to guest_map_l1e() 3: use {rd,wr}{fs,gs}base when available 4: check for canonical address before doing page walks Signed-off-by: Jan Beulich <jbeulich@suse.com>

...ither on the guest kernel, or on the host) be silently ignored, and is different from the native MSR code (which does not ignore the exceptions). As paravirt.h already includes linux/bug.h, I don't see what was the original issue preventing BUG_ON from being used. Change rdmsr(), wrmsr(), and rdmsrl() to BUG_ON() on errors. Signed-off-by: Eduardo Habkost <ehabkost at redhat.com> --- * Build-tested using allyesconfig, with no build errors. * Tested by being able to detect the following host bug: https://bugzilla.redhat.com/show_bug.cgi?id=1025868 (#GP exception on wrmsr(0x410, 0xfff...

...ither on the guest kernel, or on the host) be silently ignored, and is different from the native MSR code (which does not ignore the exceptions). As paravirt.h already includes linux/bug.h, I don't see what was the original issue preventing BUG_ON from being used. Change rdmsr(), wrmsr(), and rdmsrl() to BUG_ON() on errors. Signed-off-by: Eduardo Habkost <ehabkost at redhat.com> --- * Build-tested using allyesconfig, with no build errors. * Tested by being able to detect the following host bug: https://bugzilla.redhat.com/show_bug.cgi?id=1025868 (#GP exception on wrmsr(0x410, 0xfff...

...ed to alloc h_mci_ctrl\n"); - return -ENOMEM; - } - /* Don''t care banks before firstbank */ - memset(h_mci_ctrl, ~0, - min(firstbank, nr_mce_banks) * sizeof(*h_mci_ctrl)); - for (i = firstbank; i < nr_mce_banks; i++) - rdmsrl(MSR_IA32_MCx_CTL(i), h_mci_ctrl[i]); - } rdmsrl(MSR_IA32_MCG_CAP, value); /* For Guest vMCE usage */ @@ -551,18 +525,13 @@ static int mca_ctl_conflict(struct mcinfo_bank *bank, struct domain *d) { - int bank_nr; - - if ( !bank || !d || !h_mci_ctrl ) + if ( !bank || !d )...

...id) > +{ > + u64 vmx_msr; > + int n; > + > + /* > + * According to the Intel SDM, if Bits 27:25 of MSR_IA32_VMX_MISC is > + * n, then (n + 1) * 512 is the recommended max number of MSRs to be > + * included in the VMExit and VMEntry MSR auto switch list. > + */ > + rdmsrl(MSR_IA32_VMX_MISC, vmx_msr); > + n = ((vmx_msr & 0xe000000) >> 25) + 1; > + msr_autoload_count_max = n * KVM_VMX_DEFAULT_MSR_AUTO_LOAD_COUNT; > +} > + Any reasons to do this if it's unlikely that we'll ever update more than 512 MSRs? Paolo

...id) > +{ > + u64 vmx_msr; > + int n; > + > + /* > + * According to the Intel SDM, if Bits 27:25 of MSR_IA32_VMX_MISC is > + * n, then (n + 1) * 512 is the recommended max number of MSRs to be > + * included in the VMExit and VMEntry MSR auto switch list. > + */ > + rdmsrl(MSR_IA32_VMX_MISC, vmx_msr); > + n = ((vmx_msr & 0xe000000) >> 25) + 1; > + msr_autoload_count_max = n * KVM_VMX_DEFAULT_MSR_AUTO_LOAD_COUNT; > +} > + Any reasons to do this if it's unlikely that we'll ever update more than 512 MSRs? Paolo

...CPUS); + memset(g_hv_context.synic_message_page, 0, + sizeof(void *) * MAX_NUM_CPUS); if (!HvQueryHypervisorPresence()) { DPRINT_ERR(VMBUS, "No Windows hypervisor detected!!"); @@ -209,17 +210,17 @@ int HvInit(void) /* * We only support running on top of Hyper-V */ - rdmsrl(HV_X64_MSR_GUEST_OS_ID, gHvContext.GuestId); + rdmsrl(HV_X64_MSR_GUEST_OS_ID, g_hv_context.guestid); - if (gHvContext.GuestId != 0) { + if (g_hv_context.guestid != 0) { DPRINT_ERR(VMBUS, "Unknown guest id (0x%llx)!!", - gHvContext.GuestId); + g_hv_context.guestid); goto Clea...

...CPUS); + memset(g_hv_context.synic_message_page, 0, + sizeof(void *) * MAX_NUM_CPUS); if (!HvQueryHypervisorPresence()) { DPRINT_ERR(VMBUS, "No Windows hypervisor detected!!"); @@ -209,17 +210,17 @@ int HvInit(void) /* * We only support running on top of Hyper-V */ - rdmsrl(HV_X64_MSR_GUEST_OS_ID, gHvContext.GuestId); + rdmsrl(HV_X64_MSR_GUEST_OS_ID, g_hv_context.guestid); - if (gHvContext.GuestId != 0) { + if (g_hv_context.guestid != 0) { DPRINT_ERR(VMBUS, "Unknown guest id (0x%llx)!!", - gHvContext.GuestId); + g_hv_context.guestid); goto Clea...

Patches that were posted last week - with review comments addressed.

...ed, and is different from > > the native MSR code (which does not ignore the exceptions). > > > > As paravirt.h already includes linux/bug.h, I don't see what was the > > original issue preventing BUG_ON from being used. > > > > Change rdmsr(), wrmsr(), and rdmsrl() to BUG_ON() on errors. > > How much does this bloat the kernel? It seems to add 8 bytes to each {wr,rd}msr() call (4 extra instructions: test, jmp, ud2, jmp). allyesconfig, paravirt enabled, before: text data bss dec hex filename 108368312 23500872 55705600...

...ed, and is different from > > the native MSR code (which does not ignore the exceptions). > > > > As paravirt.h already includes linux/bug.h, I don't see what was the > > original issue preventing BUG_ON from being used. > > > > Change rdmsr(), wrmsr(), and rdmsrl() to BUG_ON() on errors. > > How much does this bloat the kernel? It seems to add 8 bytes to each {wr,rd}msr() call (4 extra instructions: test, jmp, ud2, jmp). allyesconfig, paravirt enabled, before: text data bss dec hex filename 108368312 23500872 55705600...

...644 --- a/arch/x86/hyperv/hv_init.c +++ b/arch/x86/hyperv/hv_init.c @@ -38,39 +38,11 @@ struct ms_hyperv_tsc_page *hv_get_tsc_page(void) static u64 read_hv_clock_tsc(struct clocksource *arg) { - u64 current_tick; + u64 current_tick = hv_read_tsc_page(tsc_pg); + + if (current_tick == U64_MAX) + rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick); - if (tsc_pg->tsc_sequence != 0) { - /* - * Use the tsc page to compute the value. - */ - - while (1) { - u64 tmp; - u32 sequence = tsc_pg->tsc_sequence; - u64 cur_tsc; - u64 scale = tsc_pg->tsc_scale; - s64 offset = tsc_pg->ts...

From: Haiyang Zhang <haiyangz at microsoft.com> Convert camel cased struct fields in channel_mgmt.h to lower cases Signed-off-by: Haiyang Zhang <haiyangz at microsoft.com> Signed-off-by: Hank Janssen <hjanssen at microsoft.com> --- drivers/staging/hv/channel.c | 302 ++++++++++++++++++------------------ drivers/staging/hv/channel_mgmt.c | 186 ++++++++++++------------

From: Haiyang Zhang <haiyangz at microsoft.com> Convert camel cased struct fields in channel_mgmt.h to lower cases Signed-off-by: Haiyang Zhang <haiyangz at microsoft.com> Signed-off-by: Hank Janssen <hjanssen at microsoft.com> --- drivers/staging/hv/channel.c | 302 ++++++++++++++++++------------------ drivers/staging/hv/channel_mgmt.c | 186 ++++++++++++------------

...c @@ -42,6 +42,7 @@ #include <asm/system.h> #include <asm/io.h> #include <asm/processor.h> +#include <asm/system.h> #include <asm/i387.h> #include <asm/mmu_context.h> #include <asm/pda.h> @@ -338,10 +339,10 @@ void __show_regs(struct pt_regs * regs) rdmsrl(MSR_GS_BASE, gs); rdmsrl(MSR_KERNEL_GS_BASE, shadowgs); - asm("movq %%cr0, %0": "=r" (cr0)); - asm("movq %%cr2, %0": "=r" (cr2)); - asm("movq %%cr3, %0": "=r" (cr3)); - asm("movq %%cr4, %0": "=r" (cr4)); + cr0 = r...

...c @@ -42,6 +42,7 @@ #include <asm/system.h> #include <asm/io.h> #include <asm/processor.h> +#include <asm/system.h> #include <asm/i387.h> #include <asm/mmu_context.h> #include <asm/pda.h> @@ -338,10 +339,10 @@ void __show_regs(struct pt_regs * regs) rdmsrl(MSR_GS_BASE, gs); rdmsrl(MSR_KERNEL_GS_BASE, shadowgs); - asm("movq %%cr0, %0": "=r" (cr0)); - asm("movq %%cr2, %0": "=r" (cr2)); - asm("movq %%cr3, %0": "=r" (cr3)); - asm("movq %%cr4, %0": "=r" (cr4)); + cr0 = r...

I am attaching a clocksource driver for HyperV. Signed-off-by: K. Y. Srinivasan <ksrinivasan at novell.com> -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: hyperv_clocksource.patch Url: http://lists.linux-foundation.org/pipermail/virtualization/attachments/20100405/80968881/attachment-0001.txt

I am attaching a clocksource driver for HyperV. Signed-off-by: K. Y. Srinivasan <ksrinivasan at novell.com> -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: hyperv_clocksource.patch Url: http://lists.linux-foundation.org/pipermail/virtualization/attachments/20100405/80968881/attachment-0001.txt

...17 18:05:52 2011 +0000 +++ b/xen/arch/x86/apic.c Wed Jan 19 03:24:16 2011 -0500 @@ -961,6 +961,22 @@ if ( !cpu_has_x2apic ) return; +#ifdef __i386__ + clear_bit(X86_FEATURE_X2APIC, boot_cpu_data.x86_capability); + if (x2apic_enabled) { + uint64_t msr_content; + + rdmsrl(MSR_IA32_APICBASE, msr_content); + msr_content &= ~(MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD); + wrmsrl(MSR_IA32_APICBASE, msr_content); + msr_content |= MSR_IA32_APICBASE_ENABLE; + wrmsrl(MSR_IA32_APICBASE, msr_content); + x2apic_enabled = 0; + }...

This group of patches removes all DPRINT from hv_vmbus.ko. It is divided in several patches due to size. All DPRINT calls have been removed, and where needed have been replaced with pr_XX native calls. Many debug DPRINT calls have been removed outright. The amount of clutter this driver prints has been significantly reduced. Signed-off-by: Hank Janssen <hjanssen at microsoft.com>