search for: rdmsr_safe

Displaying 20 results from an estimated 41 matches for "rdmsr_safe".

2007 Aug 27
3
[PATCH] Limit MCG Cap
Intercept guest reads of MSR_IA32_MCG_CAP and limit the number of memory banks reported to one. This prevents us from trying to read status of non-existent banks when migrated to a machine with fewer banks. Signed-off-by: Ben Guthro Signed-off-by: David Lively <dlively@virtualiron.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com
2014 May 22
2
Bug#748052: [Xen-devel] dom0 USB failing with "ehci-pci: probe of 0000:00:1d.0 faile
...ion (traps.c:2597). 2592 case MSR_EFER: 2593 rdmsr_normal: 2594 /* Everyone can read the MSR space. */ 2595 /* gdprintk(XENLOG_WARNING,"Domain attempted RDMSR %p.\n", 2596 _p(regs->ecx));*/ 2597 if ( rdmsr_safe(regs->ecx, msr_content) ) 2598 goto fail; 2599 regs->eax = (uint32_t)msr_content; 2600 regs->edx = (uint32_t)(msr_content >> 32); 2601 break; (gdb) quit root at xen-3:~# I am a noob when working with source code. How d...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 02/17] paravirt_ops - msr
...2b,3b\n\t" \ - ".previous" \ - : "=a" (ret__) \ - : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \ - ret__; }) - -#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32)) - -#define rdmsr_safe(msr,a,b) \ - ({ int ret__; \ - asm volatile ("1: rdmsr\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: movl %4,%0\n" \ - " jmp...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 02/17] paravirt_ops - msr
...2b,3b\n\t" \ - ".previous" \ - : "=a" (ret__) \ - : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \ - ret__; }) - -#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32)) - -#define rdmsr_safe(msr,a,b) \ - ({ int ret__; \ - asm volatile ("1: rdmsr\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: movl %4,%0\n" \ - " jmp...
2014 May 21
0
Bug#748052: [Xen-devel] dom0 USB failing with "ehci-pci: probe of 0000:00:1d.0 faile
>>> On 20.05.14 at 18:25, <mike at estone.ca> wrote: > I've added iommu=debug to the XEN CMD Line under grub. > Attached is the xl dmesg log and system dmesg. Okay, this at least clarifies there is a (relatively big) RMRR. There is a change to the handling of these among the ones that'll become 4.3.3 - mind giving
2014 May 23
0
Bug#748052: [Xen-devel] dom0 USB failing with "ehci-pci: probe of 0000:00:1d.0 faile
...case MSR_EFER: > 2593 rdmsr_normal: > 2594 /* Everyone can read the MSR space. */ > 2595 /* gdprintk(XENLOG_WARNING,"Domain attempted RDMSR > %p.\n", > 2596 _p(regs->ecx));*/ > 2597 if ( rdmsr_safe(regs->ecx, msr_content) ) > 2598 goto fail; > 2599 regs->eax = (uint32_t)msr_content; > 2600 regs->edx = (uint32_t)(msr_content >> 32); > 2601 break; Thanks. We can then pretty much rule out a connection of...
2014 May 20
2
Bug#748052: [Xen-devel] dom0 USB failing with "ehci-pci: probe of 0000:00:1d.0 faile
Ian Campbell <ijc at hellion.org.uk> writes: #What were the previous settings (the ones which worked for grub but not #Xen)? Do these new settings work with native Linux? # #Given the change in behaviour my gut feeling is that either the Legacy #USB Support option or the 60/64 emulation ones are the one which matters #out of that set. The default and previous settings were everything
2007 Apr 18
3
New CPUID/MSR driver; virtualization hooks
I have finally gotten off the pot and finished writing up my new CPUID/MSR driver, which contains support for registers that need arbitrary GPRs touched. For i386 vs x86-64 compatibility, both use an x86-64 register image (16 64-bit register fields); this allows 32-bit userspace to access the full 64-bit image if the kernel is 64 bits. Anyway, this presumably requires new paravirtualization
2007 Apr 18
3
New CPUID/MSR driver; virtualization hooks
I have finally gotten off the pot and finished writing up my new CPUID/MSR driver, which contains support for registers that need arbitrary GPRs touched. For i386 vs x86-64 compatibility, both use an x86-64 register image (16 64-bit register fields); this allows 32-bit userspace to access the full 64-bit image if the kernel is 64 bits. Anyway, this presumably requires new paravirtualization
2007 Apr 18
0
[PATCH] paravirt_ops x86_64 , take 2
...ysexit)(void); + void (*sysret)(void); void (*iret)(void); void (*startup_ipi_hook)(int phys_apicid, unsigned long start_eip, unsigned long start_esp); @@ -262,6 +273,14 @@ static inline void halt(void) val2 = _l >> 32; \ } while(0) +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + #define wrmsr(msr,val1,val2) do { \ u64 _l = ((u64)(val2) << 32) | (val1); \ paravirt_ops.write_msr((msr), _l); \ @@ -273,1...
2007 Apr 18
0
[PATCH] paravirt_ops x86_64 , take 2
...ysexit)(void); + void (*sysret)(void); void (*iret)(void); void (*startup_ipi_hook)(int phys_apicid, unsigned long start_eip, unsigned long start_esp); @@ -262,6 +273,14 @@ static inline void halt(void) val2 = _l >> 32; \ } while(0) +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + #define wrmsr(msr,val1,val2) do { \ u64 _l = ((u64)(val2) << 32) | (val1); \ paravirt_ops.write_msr((msr), _l); \ @@ -273,1...
2007 Dec 04
10
[PATCH 0/10] Integrate msr.h
Hello, This series of patches integrates msr.h header. What it really does, is a series of steps to allow us to get rid of duplicate code between i386 and x86_64 versions With this done, achieving paravirt for x86_64 gets really easy, just a couple of extra code. The first patch was already sent a while ago, but was not yet pushed to any tree , to my knowledge. So it is sent again. Also,
2007 Dec 04
10
[PATCH 0/10] Integrate msr.h
Hello, This series of patches integrates msr.h header. What it really does, is a series of steps to allow us to get rid of duplicate code between i386 and x86_64 versions With this done, achieving paravirt for x86_64 gets really easy, just a couple of extra code. The first patch was already sent a while ago, but was not yet pushed to any tree , to my knowledge. So it is sent again. Also,
2007 Apr 18
5
[PATCH] paravirt.h
...al = paravirt_ops.read_msr((msr),&_err); \ +} while(0) + +#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) +#define wrmsr_safe(msr,a,b) ({ \ + u64 _l = ((u64)(b) << 32) | (a); \ + paravirt_ops.write_msr((msr),_l); \ +}) + +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + +#define rdtsc(low,high) do { \ + u64 _l = paravirt_ops.read_tsc(); \ + low = (u32)_l; \ + high = _l >> 32; \ +} while(0...
2007 Apr 18
5
[PATCH] paravirt.h
...al = paravirt_ops.read_msr((msr),&_err); \ +} while(0) + +#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) +#define wrmsr_safe(msr,a,b) ({ \ + u64 _l = ((u64)(b) << 32) | (a); \ + paravirt_ops.write_msr((msr),_l); \ +}) + +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + +#define rdtsc(low,high) do { \ + u64 _l = paravirt_ops.read_tsc(); \ + low = (u32)_l; \ + high = _l >> 32; \ +} while(0...
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
...al = paravirt_ops.read_msr((msr),&_err); \ +} while(0) + +#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) +#define wrmsr_safe(msr,a,b) ({ \ + u64 _l = ((u64)(b) << 32) | (a); \ + paravirt_ops.write_msr((msr),_l); \ +}) + +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + +#define rdtsc(low,high) do { \ + u64 _l = paravirt_ops.read_tsc(); \ + low = (u32)_l; \ + high = _l >> 32; \ +} while(0...
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
...al = paravirt_ops.read_msr((msr),&_err); \ +} while(0) + +#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) +#define wrmsr_safe(msr,a,b) ({ \ + u64 _l = ((u64)(b) << 32) | (a); \ + paravirt_ops.write_msr((msr),_l); \ +}) + +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + +#define rdtsc(low,high) do { \ + u64 _l = paravirt_ops.read_tsc(); \ + low = (u32)_l; \ + high = _l >> 32; \ +} while(0...
2007 Apr 18
3
[PATCH 1/2] paravirt.h header
...al = paravirt_ops.read_msr((msr),&_err); \ +} while(0) + +#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) +#define wrmsr_safe(msr,a,b) ({ \ + u64 _l = ((u64)(b) << 32) | (a); \ + paravirt_ops.write_msr((msr),_l); \ +}) + +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + +#define rdtsc(low,high) do { \ + u64 _l = paravirt_ops.read_tsc(); \ + low = (u32)_l; \ + high = _l >> 32; \ +} while(0...
2011 Jul 30
22
[bug] ''VT-d 1G super page'' feature is blocked
Hi Tim, Could you please have a look at this bug? Thanks a lot. http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1774 Best Regards, Yongjie Ren (Jay) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 01/17] paravirt_ops - core changes
...paravirt_ops.safe_halt(); +} +#define wbinvd() paravirt_ops.wbinvd() + + +#define rdmsr(msr,val1,val2) do { \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + val1 = (u32)_l; \ + val2 = _l >> 32; \ +} while(0) + +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + +#define wrmsr(msr,val1,val2) do { \ + u64 _l = ((u64)(val2) << 32) | (val1); \ + paravirt_ops.write_msr((msr), _l); \ +} while(...