search for: rdcycle

Displaying 1 result from an estimated 1 matches for "rdcycle".

2015 Jan 11
2
[LLVMdev] Backend Tablegen Instruction Definition
...ISCV LLVM backend, I’m running into some trouble in defining the instruction formats for the system instruction. The system instructions follow a pre-defined instruction template (type-I), but differ in that they have no input registers (only the target). The system instructions are defined as: rdcycle Rt I’ve defined a stand-alone instruction definition (as opposed to using the type-I template) that is as follows: //rdcycle def RDCYCLE: InstRISCV<4, (outs GR32:$dst), (ins), ([set GC32:$dst])>{ field bits<32> Inst; bits<5> dst; let Inst{31-20} = 0b00...