Displaying 3 results from an estimated 3 matches for "rcinfos".
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rcinfo
2016 Sep 24
2
RFC: Implement variable-sized register classes
...similar way to what you describe below.
> def Is64Bit : Predicate<"Subtarget->is64Bit()">;
> def RCInfo64 : RCInfo<Is64Bit> {
> let RegTypes = [i64, v2i32, v4i16, v8i8];
> .....
> }
>
> class MyRegisterClass : RegisterClass<...> {
> let RCInfos = [RCInfo32, RCInfo64]
> }
With the RCInfo data, the new register class definition would be
something like
class MyRegisterClass : RegisterClass<...> {
let RCInfos = HwModeSelect<[Is32Bit, Is64Bit, Is128Bit],
[RCInfo32, RCInfo64, RCInfo128]>;
}...
2016 Sep 20
7
RFC: Implement variable-sized register classes
I have posted a patch that switches the API to one that supports this
(yet non-existent functionality) earlier:
https://reviews.llvm.org/D24631
The comments from that were incorporated into the following RFC.
Motivation:
Certain targets feature "variable-sized" registers, i.e. a situation
where the register size can be configured by a hardware switch. A
common instruction set
2003 Sep 08
4
is one of my hosts a scanner?
so i just found that one of my hosts is GENERATING these probe
pairs, maybe every minute or two (note the sequence numbers):
seq my host victim(s)
--- ---------------- ---------------
24) 192.168.0.2:1121 <--> 216.52.3.2:2703
25) 192.168.0.2:1122 <--> 216.52.3.4:2703
39) 192.168.0.2:1124 <-->