Displaying 5 results from an estimated 5 matches for "rcdrd".
2017 Apr 10
0
[PATCH 02/11] nvkm/ramgf100: Calculate timings
...switch ((!T(CWL)) * ram->base.type) {
+ case NVKM_RAM_TYPE_GDDR5:
+ T(CWL) = (cur1 & 0x00000380) >> 7;
+ break;
+ }
+
+ timing[0] = (T(RP) << 24 | T(RAS) << 17 | T(RFC) << 8 | T(RC));
+ timing[1] = (cur1 & ~0x03ffc07f) |
+ (T(RCDWR) << 20) |
+ (T(RCDRD) << 14) |
+ (T(CWL) << 7) |
+ (T(CL));
+ /* XXX: lower 8 bytes are two bits indicating "feature(s) X" */
+ timing[2] = (cur2 & ~0x00ffffff) |
+ (T(WR) << 16) |
+ (T(WTR) << 8);
+ timing[3] = (T(FAW)) << 9 |
+ (T(CKE)) << 5 |...
2015 May 22
11
Reclocking support for NVA0
Adds reclocking for NVA0, and a whole lot of work for other cards. Had these
patches collecting dust for a little, but tested them with both my NVA0,
and Martin's a while back. Success not guaranteed, but should be quite a
leap forward.
Happy reviewing and testing. Cheers,
Roy
2017 Apr 10
14
RESEND Preparations for Fermi DRAM clock changes
Two patches went missing as a result of PEBCAK. No v2 marks as nothing
changed really. Just resending for easier enforcement of patch order
in other people's trees. Sorry for the noise.
Original message:
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern
2014 Sep 29
18
Implement reclocking for DDR2, DDR3, GDDR3
Following a series of patches that implement memory reclocking for NVA3/5/8 with
DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics
cards, but I expect reclocking now to work on many more.
Testers can pick up these patches and test it by enabling pstate
(nouveau.pstate=1). They should then be able to change clocks by writing to
/sys/class/drm/card0/device/pstate. Correct
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern upload routines from GK104+ now shared with GT215+
- Timing calculation for Fermi
- GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that
pesky GT 240.
- A routine to translate a VBIOS init