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ramakrishnan
2015 Jun 15
2
[LLVMdev] Register Allocation on IR
Thanks. I will also work on doing an SSA register allocation that returns
SSA form (IR), since it is not yet implemented.
On Fri, Jun 12, 2015 at 9:20 PM, Matthias Braun <mbraun at apple.com> wrote:
> llvm uses three different representations until machine code is emitted:
>
> - the llvm language as specified in the llvm manuals, we usually call that
> IR
> - the selection
2015 Jun 17
3
[LLVMdev] Register Allocation on IR
...e to designate registers to llvm IR values nor is there a way to express that in IR. llvm has the machine instruction (MI) representation for that.
- Matthias
> On Jun 17, 2015, at 5:37 AM, David Chisnall <David.Chisnall at cl.cam.ac.uk> wrote:
>
> On 15 Jun 2015, at 17:21, Kartik Ramkrishnan <kartikram3 at gmail.com> wrote:
>>
>> Thanks. I will also work on doing an SSA register allocation that returns SSA form (IR), since it is not yet implemented.
>
> It’s not implemented because it doesn’t really make sense as a concept. Register allocation is all about ma...