Displaying 4 results from an estimated 4 matches for "ramddr2_wr".
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ramddr2_cl
2014 Sep 05
0
[PATCH] fb/sddr2: Generate MR values
...>id == id)
+ return xlat->enc;
+ xlat++;
+ }
+ return -EINVAL;
+}
+
+static const struct ramxlat
+ramddr2_cl[] = {
+ { 2, 2 }, { 3, 3 }, { 4, 4 }, { 5, 5 }, { 6, 6 },
+ /* The following are available in some, but not all DDR2 docs */
+ { 7, 7 },
+ { -1 }
+};
+
+static const struct ramxlat
+ramddr2_wr[] = {
+ { 2, 1 }, { 3, 2 }, { 4, 3 }, { 5, 4 }, { 6, 5 },
+ /* The following are available in some, but not all DDR2 docs */
+ { 7, 6 },
+ { -1 }
+};
+
+int
+nouveau_sddr2_calc(struct nouveau_ram *ram)
+{
+ struct nouveau_bios *bios = nouveau_bios(ram);
+ int CL, WR, DLL = 0, ODT = 0;
+
+ switch (!...
2014 Sep 05
1
RESEND 8/8: DDR2 MR generation
Sometimes boot scripts leave the "DLL reset" bit on, but it shouldn't be set on every MR write. V2 addresses this by forcing DLL reset off in MR generation
2014 Sep 04
10
MEMX improvements + DDR 2/3 MR generation
Patch 1 and 2 implement wait-for-vblank, required to remove flicker when reclocking memory
Patch 3 and 4 allow me to do things between waiting for VBLANK and disabling FB, like pause PFIFO and wait for the engines to idle. This minimises the time PFIFO is paused, thus maximises performance.
The rest of the patches speak for themselves. As the actual memory reclocking script is still somewhat prone
2015 Sep 29
10
All-round reclocking improvements
In bulletpoints:
- Add some support for G94 and G96 reclocking. Has been tested on literally
two cards, which is hardly adequate as "full coverage". On the other hand,
the changes were small enough to make me confident this might work for others
as well.
- Fix NV50 wait for VBLANK when no monitor is plugged in.
- Voltage related inprovements for GT21x.
- Slightly improve Keplers