Displaying 19 results from an estimated 19 matches for "r_type".
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d_type
2012 Jun 07
1
[LLVMdev] How to implement new ELF 64 bit relocation (N64)
...ruct
{
Elf64_Addr r_offset;
Elf64_Xword r_info;
Elf64_Sxword r_addend;
} Elf64_Rela;
Whereas N64 has the following format:
typedef struct
{
Elf64_Addr r_offset; /* Address of reference */
Elf64_Word r_sym; /* Symbol index */
Elf64_Byte r_ssym; /* Special symbol */
Elf64_Byte r_type3; /* Relocation type */
Elf64_Byte r_type2; /* Relocation type */
Elf64_Byte r_type; /* Relocation type */
} Elf64_Rel;
typedef struct
{
Elf64_Addr r_offset; /* Address of reference */
Elf64_Word r_sym; /* Symbol index */
Elf64_Byte r_ssym; /* Special symbol */
Elf64_Byte r_...
2018 May 23
0
[PATCH v3 18/27] xen: Adapt assembly for PIE support
...));
+}
static int do_reloc64(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym,
const char *symname)
@@ -895,8 +905,12 @@ static int do_reloc64(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym,
* the relocations are processed.
* Make sure that the offset will fit.
*/
- if (r_type != R_X86_64_64 && (int32_t)offset != (int64_t)offset)
+ if (r_type != R_X86_64_64 &&
+ (int32_t)offset != (int64_t)offset) {
+ if (is_in_xenpvh_assembly(offset))
+ break;
die("Relocation offset doesn't fit in 32 bits\n");
+ }
if (r_type == R_X86_64...
2015 Feb 05
5
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...ation of a very specific kind of relocations
used by MIPS N64 ABI. As usual the main problem is how to pass target specific
data over Native/YAML conversion barrier.
In this ABI relocation record r_info field in fact consists of five subfields:
* r_sym - symbol index
* r_ssym - special symbol
* r_type3 - third relocation type
* r_type2 - second relocation type
* r_type - first relocation type
Up to three these relocations applied one by one. The first relocation uses
an addendum from the relocation record. Each subsequent relocation takes as
its addend the result of the previous operation. Onl...
2015 Feb 06
4
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...sual the main problem is how to pass target
>> specific
>> data over Native/YAML conversion barrier.
>>
>> In this ABI relocation record r_info field in fact consists of five
>> subfields:
>> * r_sym - symbol index
>> * r_ssym - special symbol
>> * r_type3 - third relocation type
>> * r_type2 - second relocation type
>> * r_type - first relocation type
>>
>> Up to three these relocations applied one by one. The first relocation
>> uses
>> an addendum from the relocation record. Each subsequent relocation takes
&g...
2015 Feb 07
2
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...> used by MIPS N64 ABI. As usual the main problem is how to pass target
> specific
> data over Native/YAML conversion barrier.
>
> In this ABI relocation record r_info field in fact consists of five
> subfields:
> * r_sym - symbol index
> * r_ssym - special symbol
> * r_type3 - third relocation type
> * r_type2 - second relocation type
> * r_type - first relocation type
>
> Up to three these relocations applied one by one. The first relocation
> uses
> an addendum from the relocation record. Each subsequent relocation takes
> as
> its addend th...
2015 Feb 07
2
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...gt; >>> data over Native/YAML conversion barrier.
> >>>
> >>> In this ABI relocation record r_info field in fact consists of five
> >>> subfields:
> >>> * r_sym - symbol index
> >>> * r_ssym - special symbol
> >>> * r_type3 - third relocation type
> >>> * r_type2 - second relocation type
> >>> * r_type - first relocation type
> >>>
> >>> Up to three these relocations applied one by one. The first relocation
> >>> uses
> >>> an addendum from the...
2015 Feb 09
2
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...he main problem is how to pass target specific
>>> data over Native/YAML conversion barrier.
>>>
>>> In this ABI relocation record r_info field in fact consists of five subfields:
>>> * r_sym - symbol index
>>> * r_ssym - special symbol
>>> * r_type3 - third relocation type
>>> * r_type2 - second relocation type
>>> * r_type - first relocation type
>>>
>>> Up to three these relocations applied one by one. The first relocation uses
>>> an addendum from the relocation record. Each subsequent relocati...
2015 Feb 07
4
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...ier.
> >> >>>
> >> >>> In this ABI relocation record r_info field in fact consists of five
> >> >>> subfields:
> >> >>> * r_sym - symbol index
> >> >>> * r_ssym - special symbol
> >> >>> * r_type3 - third relocation type
> >> >>> * r_type2 - second relocation type
> >> >>> * r_type - first relocation type
> >> >>>
> >> >>> Up to three these relocations applied one by one. The first
> relocation
> >> >>...
2015 Feb 07
2
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...gt;>>
>> >> >>> In this ABI relocation record r_info field in fact consists of five
>> >> >>> subfields:
>> >> >>> * r_sym - symbol index
>> >> >>> * r_ssym - special symbol
>> >> >>> * r_type3 - third relocation type
>> >> >>> * r_type2 - second relocation type
>> >> >>> * r_type - first relocation type
>> >> >>>
>> >> >>> Up to three these relocations applied one by one. The first
>> relocation
&...
2015 Feb 09
2
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...t;>> data over Native/YAML conversion barrier.
>>>>>
>>>>> In this ABI relocation record r_info field in fact consists of five
>> subfields:
>>>>> * r_sym - symbol index
>>>>> * r_ssym - special symbol
>>>>> * r_type3 - third relocation type
>>>>> * r_type2 - second relocation type
>>>>> * r_type - first relocation type
>>>>>
>>>>> Up to three these relocations applied one by one. The first relocation
>> uses
>>>>> an addendum fro...
2018 Mar 13
32
[PATCH v2 00/27] x86: PIE support and option to extend KASLR randomization
Changes:
- patch v2:
- Adapt patch to work post KPTI and compiler changes
- Redo all performance testing with latest configs and compilers
- Simplify mov macro on PIE (MOVABS now)
- Reduce GOT footprint
- patch v1:
- Simplify ftrace implementation.
- Use gcc mstack-protector-guard-reg=%gs with PIE when possible.
- rfc v3:
- Use --emit-relocs instead of -pie to reduce
2018 Mar 13
32
[PATCH v2 00/27] x86: PIE support and option to extend KASLR randomization
Changes:
- patch v2:
- Adapt patch to work post KPTI and compiler changes
- Redo all performance testing with latest configs and compilers
- Simplify mov macro on PIE (MOVABS now)
- Reduce GOT footprint
- patch v1:
- Simplify ftrace implementation.
- Use gcc mstack-protector-guard-reg=%gs with PIE when possible.
- rfc v3:
- Use --emit-relocs instead of -pie to reduce
2017 Oct 04
28
x86: PIE support and option to extend KASLR randomization
These patches make the changes necessary to build the kernel as Position
Independent Executable (PIE) on x86_64. A PIE kernel can be relocated below
the top 2G of the virtual address space. It allows to optionally extend the
KASLR randomization range from 1G to 3G.
Thanks a lot to Ard Biesheuvel & Kees Cook on their feedback on compiler
changes, PIE support and KASLR in general. Thanks to
2017 Oct 04
28
x86: PIE support and option to extend KASLR randomization
These patches make the changes necessary to build the kernel as Position
Independent Executable (PIE) on x86_64. A PIE kernel can be relocated below
the top 2G of the virtual address space. It allows to optionally extend the
KASLR randomization range from 1G to 3G.
Thanks a lot to Ard Biesheuvel & Kees Cook on their feedback on compiler
changes, PIE support and KASLR in general. Thanks to
2018 May 23
33
[PATCH v3 00/27] x86: PIE support and option to extend KASLR randomization
Changes:
- patch v3:
- Update on message to describe longer term PIE goal.
- Minor change on ftrace if condition.
- Changed code using xchgq.
- patch v2:
- Adapt patch to work post KPTI and compiler changes
- Redo all performance testing with latest configs and compilers
- Simplify mov macro on PIE (MOVABS now)
- Reduce GOT footprint
- patch v1:
- Simplify ftrace
2017 Oct 11
32
[PATCH v1 00/27] x86: PIE support and option to extend KASLR randomization
Changes:
- patch v1:
- Simplify ftrace implementation.
- Use gcc mstack-protector-guard-reg=%gs with PIE when possible.
- rfc v3:
- Use --emit-relocs instead of -pie to reduce dynamic relocation space on
mapped memory. It also simplifies the relocation process.
- Move the start the module section next to the kernel. Remove the need for
-mcmodel=large on modules. Extends
2017 Oct 11
32
[PATCH v1 00/27] x86: PIE support and option to extend KASLR randomization
Changes:
- patch v1:
- Simplify ftrace implementation.
- Use gcc mstack-protector-guard-reg=%gs with PIE when possible.
- rfc v3:
- Use --emit-relocs instead of -pie to reduce dynamic relocation space on
mapped memory. It also simplifies the relocation process.
- Move the start the module section next to the kernel. Remove the need for
-mcmodel=large on modules. Extends
2013 Sep 25
1
[LLVMdev] arm64 / iOS support
...b2ac6b3..cb12902 100644
--- a/include/llvm/Support/MachO.h
+++ b/include/llvm/Support/MachO.h
@@ -402,6 +402,21 @@ namespace llvm {
ARM_THUMB_32BIT_BRANCH = 7, // obsolete
ARM_RELOC_HALF = 8,
ARM_RELOC_HALF_SECTDIFF = 9,
+
+ // Constant values for r_type field in an arm64 architecture
+ ARM64_RELOC_UNSIGNED = GENERIC_RELOC_VANILLA, // for pointers
+ ARM64_RELOC_SUBTRACTOR = 1, // must be followed by a ARM64_RELOC_UNSIGNED
+ ARM64_RELOC_BRANCH26 =2, // a B/BL instruction with 26-bit displacement
+ ARM64_RELOC_PAGE...
2015 Feb 07
2
[LLVMdev] [lld] Representation of lld::Reference with a fake target
...s ABI relocation record r_info field in fact consists of
>>>> five
>>>> >> >>> subfields:
>>>> >> >>> * r_sym - symbol index
>>>> >> >>> * r_ssym - special symbol
>>>> >> >>> * r_type3 - third relocation type
>>>> >> >>> * r_type2 - second relocation type
>>>> >> >>> * r_type - first relocation type
>>>> >> >>>
>>>> >> >>> Up to three these relocations applied one by one....