Displaying 3 results from an estimated 3 matches for "r_riscv_align".
2017 Jul 12
5
[LLD] Linker Relaxation
...a0, a0
.p2align 2
li a0, 0
The assembler inserts a 3-byte padding (note: this behavior isn't
merged yet, see: https://github.com/riscv/riscv-binutils-gdb/pull/88):
00000000 <_start>:
0: 852a mv a0,a0
2: 00 01 00 # R_RISCV_ALIGN
2: R_RISCV_ALIGN *ABS*+0x3
5: 4501 li a0,0
The linker then remove 1 byte from padding to align to the desired width:
00010054 <_start>:
10054: 852a mv a0,a0
10056: 0001 n...
2020 Feb 28
5
A Propeller link (similar to a Thin Link as used by ThinLTO)?
...cating the jump relocation, detecting the jump type,
inverting the direction of a jump, and deleting trailing bytes of an
input section. The existing linker relaxation schemes already do similar
things. Deleting a trailing jump is similar to RISC-V where sections can
shrink (not implemented in lld; R_RISCV_ALIGN and R_RISCV_RELAX are in
my mind)) (binutils supports deleting bytes for a few other
architectures, e.g. msp430, sh, mips, ft32, rl78). With just minimal
amount of disassembly work, conceptually the framework should not be too
hard to be ported to another target.
One thing I was not aware of (pe...
2017 Jul 11
8
[LLD] Linker Relaxation
Here's an example using the gcc toolchain for embedded 32 bit RISC-V (my
HiFive1 board):
#include <stdio.h>
int foo(int i){
if (i < 100){
printf("%d\n", i);
}
return i;
}
int main(){
foo(10);
return 0;
}
After compiling to a .o with -O2 -march=RV32IC we get (just looking at foo)
00000000 <foo>:
0: 1141 addi sp,sp,-16