Displaying 5 results from an estimated 5 matches for "r_2_v_0".
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r_0_v_0
2017 Jul 10
2
Conditional Register Assignment based on the no of loop iterations
hello,
i have a situation where i have to assign the registers to instructions
based on the loop iterations.
for eg..
the registers are:
R_0_V_0, R_0_V_1, R_0_V_2, R_0_V_3,
R_1_V_0, R_1_V_1, R_1_V_2, R_1_V_3,
R_2_V_0, R_2_V_1, R_2_V_2, R_2_V_3.
These registers defined in object Reg_A
These are total 12 registers. will use them contiguously, here i define it
in above mentioned order i.e changing V first then R.
for eg;
if no of iterations>=4.
1st load will take place in R_0_V_0
2nd load will take place in...
2017 Jul 10
2
Conditional Register Assignment based on the no of loop iterations
...>> hello,
>>
>> i have a situation where i have to assign the registers to instructions
>> based on the loop iterations.
>>
>> for eg..
>> the registers are:
>> R_0_V_0, R_0_V_1, R_0_V_2, R_0_V_3,
>> R_1_V_0, R_1_V_1, R_1_V_2, R_1_V_3,
>> R_2_V_0, R_2_V_1, R_2_V_2, R_2_V_3.
>> These registers defined in object Reg_A
>>
>> These are total 12 registers. will use them contiguously, here i define
>> it in above mentioned order i.e changing V first then R.
>>
>>
>> for eg;
>> if no of iterations&g...
2017 Jul 11
2
error: In anonymous_4820: Unrecognized node 'VRR128'!
hello,
i need to use v32i32 and v32f32 in store instructions.
I defined my register as;
def VRR128 : RegisterClass<"X86", [v32i32, v32f32],
1024, (add R_0_V_0, R_1_V_0, R_2_V_0)>;
def STORE_DWORD : I<0x70, MRMDestMem, (outs), (ins i2048mem:$dst,
VRR128:$src),
"STORE_DWORD\t{$src, $dst|$dst, $src}",
[(store (v32i32 (bitconvert VRR128:$src)), addr:$dst)],
IIC_MOV_MEM>, TA;
def: Pat<(store (v32f32 (bitconvert...
2017 Jul 11
2
error: In anonymous_4820: Unrecognized node 'VRR128'!
...305 at gmail.com>
> wrote:
>
>> hello,
>> i need to use v32i32 and v32f32 in store instructions.
>> I defined my register as;
>>
>> def VRR128 : RegisterClass<"X86", [v32i32, v32f32],
>> 1024, (add R_0_V_0, R_1_V_0, R_2_V_0)>;
>>
>> def STORE_DWORD : I<0x70, MRMDestMem, (outs), (ins i2048mem:$dst,
>> VRR128:$src),
>> "STORE_DWORD\t{$src, $dst|$dst, $src}",
>> [(store (v32i32 (bitconvert VRR128:$src)),
>> addr:$dst)], IIC_MOV_ME...
2017 Jul 11
2
error: In anonymous_4820: Unrecognized node 'VRR128'!
...t;> hello,
>>>> i need to use v32i32 and v32f32 in store instructions.
>>>> I defined my register as;
>>>>
>>>> def VRR128 : RegisterClass<"X86", [v32i32, v32f32],
>>>> 1024, (add R_0_V_0, R_1_V_0, R_2_V_0)>;
>>>>
>>>> def STORE_DWORD : I<0x70, MRMDestMem, (outs), (ins i2048mem:$dst,
>>>> VRR128:$src),
>>>> "STORE_DWORD\t{$src, $dst|$dst, $src}",
>>>> [(store (v32i32 (bitconvert VRR128:...