search for: r63

Displaying 12 results from an estimated 12 matches for "r63".

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2006 Sep 13
2
ports / www/linux-seamonkey / flashplugin vulnerability
Hi! Since linux-flashplugin7 r63 is vulnerable according to http://vuxml.FreeBSD.org/7c75d48c-429b-11db-afae-000c6ec775d9.html isn't www/linux-seamonkey vulerable, too (it seems to include 7 r25)? Bye Arne __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protec...
2008 Apr 04
2
[LLVMdev] InstCombine Question
...<2 x i64>* %"$LCS_1", align 16 ; <<2 x i64>> [#uses=2] ; srcLine 41 %r61 = extractelement <2 x i64> %r60, i32 0 ; <i64> [#uses=1] ; srcLine 41 %r62 = getelementptr <2 x double>* null, i32 0, i64 %r61 ; <double*> [#uses=1] ; srcLine 41 %r63 = load double* %r62 ; <double> [#uses=1] ; srcLine 41 So we're loading a vector of pointers and then using getelementptr as basically a reg-reg copy with a cast (I think). Yes, it's a little weird, but legal AFAICS. I'm not sure if the above code is really kosher. It is ve...
2009 Dec 15
1
Changing Column names in (Output) csv file
...quot;, "R12", "R13"), c("R21", "R22", "R23"), c("R31", "R32", "R33"), c("R41", "R42", "R43"), c("R51", "R52", "R53"), c("R61", "R62", "R63"), c("R71", "R72", "R73"), c("R81", "R82", "R83"),  c("R91", "R92", "R93"), c("R101", "R102", "R103"))   range_prob <- list() range_prob[[1]]  <- c(0.42,0.22,0.36) rang...
2014 May 01
13
[Bug 78161] New: [NV96] Artifacts in output of fragment program containing not unrolled loops with conditional break
https://bugs.freedesktop.org/show_bug.cgi?id=78161 Priority: medium Bug ID: 78161 Assignee: nouveau at lists.freedesktop.org Summary: [NV96] Artifacts in output of fragment program containing not unrolled loops with conditional break Severity: normal Classification: Unclassified OS: Linux (All)
2010 Jun 15
0
[LLVMdev] Question on X86 backend
...R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, R58, R59, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, R70, R71, R72, R73, R74, R75, R76, R77, R78, R79, R80, R81, R82, R83, R84, R85, R86, R87, R88, R89, R90, R91, R92, R93, R94, R95, R96, R97, R98, R99, R100, R101, R102, R103, R104, R105, R106, R107, R108, R109, R110, R111, R112, R113, R114, R115, R116, R117, R118,...
2010 Jun 15
2
[LLVMdev] Question on X86 backend
Hi Micah, > In X86InstrInfo.td for Call Instructions, it mentions that Uses for > argument registers are added manually. Can someone point me to the > location where they are added as the comment doesn't reference a > where or how? the register uses are added by the function X86TargetLowering::LowerCall() during the DAG Lowering phase. This is the relevant code segment: // Add
2008 Apr 04
0
[LLVMdev] InstCombine Question
...uot;$LCS_1", align 16 ; <<2 x i64>> [#uses=2] ; > srcLine 41 > %r61 = extractelement <2 x i64> %r60, i32 0 ; <i64> [#uses=1] ; srcLine > 41 %r62 = getelementptr <2 x double>* null, i32 0, i64 %r61 ; <double*> > [#uses=1] ; srcLine 41 > %r63 = load double* %r62 ; <double> [#uses=1] ; srcLine 41 > > So we're loading a vector of pointers and then using getelementptr as > basically a reg-reg copy with a cast (I think). Yes, it's a little weird, > but legal AFAICS. > > I'm not sure if the above code...
2008 Apr 04
0
[LLVMdev] InstCombine Question
On Fri, 4 Apr 2008, David Greene wrote: > I am confused by this bit of code in instcombine: > > 09789 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(Op)) { > 09790 const Value *GEPI0 = GEPI->getOperand(0); > 09791 // TODO: Consider a target hook for valid address spaces for this > xform. > 09792 if (isa<ConstantPointerNull>(GEPI0)
2017 Apr 29
2
[PATCH] nv50/ir: we can't replace 0x0 with zero reg for SHLADD
fixes a crash in Alien Isolation Signed-off-by: Karol Herbst <karolherbst at gmail.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 732e1a93b4..4815d6df07 100644 ---
2008 Apr 04
2
[LLVMdev] InstCombine Question
I am confused by this bit of code in instcombine: 09789 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(Op)) { 09790 const Value *GEPI0 = GEPI->getOperand(0); 09791 // TODO: Consider a target hook for valid address spaces for this xform. 09792 if (isa<ConstantPointerNull>(GEPI0) && 09793
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++- 1 file changed, 63 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp index dfb093c..e38a3b8 100644 ---
2015 Jun 07
43
[Bug 90887] New: PhiMovesPass in register allocator broken
https://bugs.freedesktop.org/show_bug.cgi?id=90887 Bug ID: 90887 Summary: PhiMovesPass in register allocator broken Product: Mesa Version: git Hardware: All OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at