Displaying 3 results from an estimated 3 matches for "r600registerinfo".
2014 Jul 31
3
[LLVMdev] initialize register attributes in instruction definition
Hi All,
Is it possible to initialize(set up) register attributes when we define an instruction?
like
if a register is defined like this:
" class SC_Register<bits<8> register_num,
REG_FLAG SC_X,
REG_FLAG SC_Y,
REG_FLAG SC_Z,
REG_FLAG SC_W,
string asmstr> : Register<asmstr>
{
let HWEncoding{7-0} =
2014 Aug 01
2
[LLVMdev] initialize register attributes in instruction definition
...ch what i want to do. If I can initialize it in the instruction definition stage( it is operation related).
Then I can directly access it for the machine instruction emit.
That would be nice.
Tks
kevin
> This is something that the R600 backend does a lot. Take a look at
> lib/Target/R600/ R600RegisterInfo.td and R600Instructions.td
>
> -Tom
>
>> {
>> def GENri : my_instr <op, 0, (outs GPR_V4_R32:$dst), (ins GPR_V4_R32:$src),
>> !strconcat(asmstr, " $dst, ""$src"),
>>...
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
...tructions.td
> llvm/trunk/lib/Target/AMDGPU/R600Intrinsics.td
> llvm/trunk/lib/Target/AMDGPU/R600KernelParameters.cpp
> llvm/trunk/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp
> llvm/trunk/lib/Target/AMDGPU/R600MachineFunctionInfo.h
> llvm/trunk/lib/Target/AMDGPU/R600RegisterInfo.cpp
> llvm/trunk/lib/Target/AMDGPU/R600RegisterInfo.h
> llvm/trunk/lib/Target/AMDGPU/R600RegisterInfo.td
> llvm/trunk/lib/Target/AMDGPU/R600Schedule.td
> llvm/trunk/lib/Target/AMDGPU/SIAssignInterpRegs.cpp
> llvm/trunk/lib/Target/AMDGPU/SICodeEmitter.cpp
>...