search for: r52

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2020 Sep 23
2
Incorrect Cortex-R4/R4F/R5 ProcessorModel in ARM.td
...s well as r7 and r8) is based on "CortexA8Model", which seems incorrect. When this was added in 2015, there were also comments associated with this configuration, such as "// FIXME: R5 has currently the same ProcessorModel as A8" (later removed). The processor model for Cortex-r52 appears to be correct and corresponds to an associated "CortexR52Model". Does anyone know why r4/r4f/r5 were setup based on "CortexA8Model". Is there a plan to upstream a fix to correct this? Thanks! Alan Phipps -------------- next part -------------- An HTML attachment was...
2011 Nov 22
1
Asterisk refuses INVITE (401) and I don't know why
...ac4", uri="sip:3221112233 at A1.A1.A1.A1:5060", response="60be856773 f86450fc9ddbaf7a568505", algorithm=MD5 Allow: INVITE, ACK, CANCEL, BYE, OPTIONS, INFO, UPDATE Max-Forwards: 70 Privacy: none P-Asserted-Identity: <sip:3224445566 at sip.domain.tld> User-Agent: A5000 R52-H2C0205 P-Behind-Gsi: 192.168.6.1 Content-Type: application/sdp Content-Length:195 v=0 o=- 0 0 IN IP4 sip.domain.tld s=- i=(o=IN IP4 10.1.2.35) c=IN IP4 AS.AS.AS.AS t=0 0 m=audio 62654 RTP/AVP 8 0 a=rtcp:65115 a=rtpmap:8 PCMA/8000 a=rtpmap:0 PCMU/8000 a=ptime:20 <-------------> [Nov 18 15:...
2007 Nov 12
2
CentOS5 and ipw2200
Hi all! I tried to use CentOS5 on an IBM Thinkpad R52 which has an Intel PRO/Wireless 2915ABG Mini-PCI Adapter installed. I downloaded the firmware from the DAG-Repo (afaik 3.0.0) and added a "alias eth1 ipw2200" to modules.conf. After the module was loaded successfully (including the firmware) I was able to configure the card. For simpli...
2009 Dec 15
1
Changing Column names in (Output) csv file
...ollowing is a part of R code.   data_lab <- expand.grid(c("R11", "R12", "R13"), c("R21", "R22", "R23"), c("R31", "R32", "R33"), c("R41", "R42", "R43"), c("R51", "R52", "R53"), c("R61", "R62", "R63"), c("R71", "R72", "R73"), c("R81", "R82", "R83"),  c("R91", "R92", "R93"), c("R101", "R102", "R103"))...
2010 Jun 15
0
[LLVMdev] Question on X86 backend
...dle a function call let isCall = 1, Defs = [ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, R58, R59, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, R70, R71, R72, R73, R74, R75, R76, R77, R78, R79, R80, R81, R82, R83, R84, R85, R86, R87, R88, R89, R90, R91, R92, R93, R94, R95, R96, R97, R98, R99, R100, R101, R102, R103, R104, R105, R106, R107, R108, R109,...
2018 Apr 27
2
[RFC] Script to match open Phabricator reviews with potential reviewers
...ristof.beyls at arm.com<mailto:kristof.beyls at arm.com> (found 8 reviews): [3.37%/41.67%] https://reviews.llvm.org/D46018 '[GlobalISel][IRTranslator] Split aggregates during IR translation' by Amara Emerson [0.00%/100.00%] https://reviews.llvm.org/D46111 '[ARM] Enable misched for R52.' by Dave Green [0.00%/50.00%] https://reviews.llvm.org/D45770 '[AArch64] Disable spill slot scavenging when stack realignment required.' by Paul Walker [0.00%/40.00%] https://reviews.llvm.org/D42759 '[CGP] Split large data structres to sink more GEPs' by Haicheng Wu [0.00%/25.0...
2010 Jun 15
2
[LLVMdev] Question on X86 backend
Hi Micah, > In X86InstrInfo.td for Call Instructions, it mentions that Uses for > argument registers are added manually. Can someone point me to the > location where they are added as the comment doesn't reference a > where or how? the register uses are added by the function X86TargetLowering::LowerCall() during the DAG Lowering phase. This is the relevant code segment: // Add
2015 Jun 07
43
[Bug 90887] New: PhiMovesPass in register allocator broken
https://bugs.freedesktop.org/show_bug.cgi?id=90887 Bug ID: 90887 Summary: PhiMovesPass in register allocator broken Product: Mesa Version: git Hardware: All OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at
2018 May 02
0
[RFC] Script to match open Phabricator reviews with potential reviewers
...> SUMMARY FOR kristof.beyls at arm.com (found 8 reviews): > [3.37%/41.67%] https://reviews.llvm.org/D46018 '[GlobalISel][IRTranslator] > Split aggregates during IR translation' by Amara Emerson > [0.00%/100.00%] https://reviews.llvm.org/D46111 '[ARM] Enable misched for > R52.' by Dave Green > [0.00%/50.00%] https://reviews.llvm.org/D45770 '[AArch64] Disable spill slot > scavenging when stack realignment required.' by Paul Walker > [0.00%/40.00%] https://reviews.llvm.org/D42759 '[CGP] Split large data > structres to sink more GEPs' by Hai...
2008 Nov 04
1
Atheros AR5141
Hi I got myself a nice little R52 802.11a/b/g MiniPCI Card for our router. This card is using the Atheros AR5141 chipset. I searched everywhere to find out more info on this and came across a few pages where it said that the AR5141 chipset is supported but when I stick the card in the router and boot FreeBSD 7-STABLE it hangs when...