Displaying 4 results from an estimated 4 matches for "r284779".
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r284775
2016 Dec 14
4
Enabling scalarized conditional stores in the loop vectorizer
I haven't verified what Matt described is what actually happens, but
assuming it is - that is a known issue in the x86 cost model.
Vectorizing interleaved memory accesses on x86 was, until recently,
disabled by default. It's been enabled since r284779, but the cost model is
very conservative, and basically assumes we're going to scalarize
interleaved ops.
I believe Farhana is working on improving that.
Michael
On Wed, Dec 14, 2016 at 8:44 AM, Das, Dibyendu <Dibyendu.Das at amd.com> wrote:
> Hi Matt-
>
>
>
> Yeah I u...
2016 Dec 15
0
Enabling scalarized conditional stores in the loop vectorizer
...s.llvm.org> wrote:
> I haven't verified what Matt described is what actually happens, but
> assuming it is - that is a known issue in the x86 cost model.
>
> Vectorizing interleaved memory accesses on x86 was, until recently,
> disabled by default. It's been enabled since r284779, but the cost model is
> very conservative, and basically assumes we're going to scalarize
> interleaved ops.
>
> I believe Farhana is working on improving that.
>
> Michael
>
>
> On Wed, Dec 14, 2016 at 8:44 AM, Das, Dibyendu <Dibyendu.Das at amd.com>
> wrot...
2016 Dec 15
0
Enabling scalarized conditional stores in the loop vectorizer
...zed conditional stores in the loop vectorizer
I haven't verified what Matt described is what actually happens, but assuming it is - that is a known issue in the x86 cost model.
Vectorizing interleaved memory accesses on x86 was, until recently, disabled by default. It's been enabled since r284779, but the cost model is very conservative, and basically assumes we're going to scalarize interleaved ops.
I believe Farhana is working on improving that.
Michael
On Wed, Dec 14, 2016 at 8:44 AM, Das, Dibyendu <Dibyendu.Das at amd.com<mailto:Dibyendu.Das at amd.com>> wrote:
Hi Ma...
2016 Dec 14
0
Enabling scalarized conditional stores in the loop vectorizer
Hi Matt-
Yeah I used a pretty recent llvm (post 3.9) on an x86-64 ( both AMD and Intel ).
-dibyendu
From: Matthew Simpson [mailto:mssimpso at codeaurora.org]
Sent: Wednesday, December 14, 2016 10:03 PM
To: Das, Dibyendu <Dibyendu.Das at amd.com>
Cc: Michael Kuperstein <mkuper at google.com>; llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] Enabling scalarized conditional stores in