Displaying 2 results from an estimated 2 matches for "r259297".
2016 Mar 05
2
[AMDGPU] non-hsa intrinsic with hsa target
...rayidx = getelementptr inbounds float, float addrspace(1)* %array, i64
%0
store float 1.000000e+00, float addrspace(1)* %arrayidx, align 4, !tbaa !8
ret void
}
which cannot be handled by llc with the message "the non-hsa instrinsic
with hsa target shown".
After looking into the log (r259297), my question is that is there other
intrinsic that support this case when the target is amdgcn--amdhsa? In the
log of r259297, it states that AMDGPUPromoteAlloca pass (a backend pass)
will generate this intrinsic, but even when I just emit-llvm without going
through llc, this intrinsic is still e...
2016 Mar 05
2
[AMDGPU] non-hsa intrinsic with hsa target
...gt; store float 1.000000e+00, float addrspace(1)* %arrayidx, align 4, !tbaa
>> !8
>> ret void
>> }
>>
>> which cannot be handled by llc with the message "the non-hsa instrinsic
>> with hsa target shown".
>>
>> After looking into the log (r259297), my question is that is there other
>> intrinsic that support this case when the target is amdgcn--amdhsa? In the
>> log of r259297, it states that AMDGPUPromoteAlloca pass (a backend pass)
>> will generate this intrinsic, but even when I just emit-llvm without going
>> th...