Displaying 2 results from an estimated 2 matches for "r1_z".
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c1_z
2005 May 06
3
[LLVMdev] avoid live range overlap of "vector" registers
...Reg<string n> : Register<n> {}
def r0_x: FooReg<"r0.x">;
def r0_y: FooReg<"r0.y">;
def r0_z: FooReg<"r0.z">;
def r0_w: FooReg<"r0.w">;
def r1_x: FooReg<"r1.x">;
def r1_y: FooReg<"r1.y">;
def r1_z: FooReg<"r1.z">;
def r1_w: FooReg<"r1.w">;
...
and there are 32 vector registers!
i've read Target.rd:
// RegisterGroup - This can be used to define instances of Register which
// need to specify aliases.
// List "aliases" specifies which registers...
2005 May 10
0
[LLVMdev] avoid live range overlap of "vector" registers
...{}
>
> def r0_x: FooReg<"r0.x">;
> def r0_y: FooReg<"r0.y">;
> def r0_z: FooReg<"r0.z">;
> def r0_w: FooReg<"r0.w">;
> def r1_x: FooReg<"r1.x">;
> def r1_y: FooReg<"r1.y">;
> def r1_z: FooReg<"r1.z">;
> def r1_w: FooReg<"r1.w">;
> ...
>
> and there are 32 vector registers!
>
>
> i've read Target.rd:
>
> // RegisterGroup - This can be used to define instances of Register which
> // need to specify aliases.
> //...