search for: r172868

Displaying 6 results from an estimated 6 matches for "r172868".

2013 Sep 19
0
[LLVMdev] unaligned AVX store gets split into two instructions
Nadav, We see multiple regressions after r172868 in ISPC compiler (based on LLVM optimizer). The regressions are due to spill/reloads, which are due to increase register pressure. This matches Zach's analysis. We've filed bug 17285 for this problem. Is there any possibility to avoid splitting in case of multiple loads going together? Dm...
2013 Jul 10
2
[LLVMdev] unaligned AVX store gets split into two instructions
...matrix-matrix inner-kernel, I see a ~25% decrease in performance, >> which >> seems to be due to this. >> >> Any ideas why this changed? Thanks! >> >> >> This was intentional; apparently doing it with two instructions is >> supposed to be faster. See r172868/r172894. >> >> Adding Nadav in case he has anything more to say. >> >> -Eli >> >> >> > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130710/86bbc835/attachment.h...
2013 Jul 10
0
[LLVMdev] unaligned AVX store gets split into two instructions
...as a > single instruction (details below). > In a matrix-matrix inner-kernel, I see a ~25% decrease in performance, which > seems to be due to this. > > Any ideas why this changed? Thanks! This was intentional; apparently doing it with two instructions is supposed to be faster. See r172868/r172894. Adding Nadav in case he has anything more to say. -Eli
2013 Jul 10
3
[LLVMdev] unaligned AVX store gets split into two instructions
...tails below). >> In a matrix-matrix inner-kernel, I see a ~25% decrease in performance, which >> seems to be due to this. >> >> Any ideas why this changed? Thanks! > > This was intentional; apparently doing it with two instructions is > supposed to be faster. See r172868/r172894. > > Adding Nadav in case he has anything more to say. > > -Eli -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130709/c745e7fb/attachment.html>
2013 Jul 10
0
[LLVMdev] unaligned AVX store gets split into two instructions
...tion (details below). > In a matrix-matrix inner-kernel, I see a ~25% decrease in performance, > which > seems to be due to this. > > Any ideas why this changed? Thanks! > > > This was intentional; apparently doing it with two instructions is > supposed to be faster. See r172868/r172894. > > Adding Nadav in case he has anything more to say. > > -Eli > > > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130709/a7243480/attachment.html>
2013 Jul 10
4
[LLVMdev] unaligned AVX store gets split into two instructions
I'm seeing a difference in how LLVM 3.3 and 3.2 emit unaligned vector loads on AVX. 3.3 is splitting up an unaligned vector load but in 3.2, it was emitted as a single instruction (details below). In a matrix-matrix inner-kernel, I see a ~25% decrease in performance, which seems to be due to this. Any ideas why this changed? Thanks! Zach LLVM Code: define <4 x double> @vstore(<4 x