Displaying 20 results from an estimated 169 matches for "r16".
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2012 Aug 09
0
[LLVMdev] MI bundle liveness attributes
...ut did not result in any code (AFIK).
How do we represent a _conditional_ assignment (def) in a bundle MI?
More contents - currently we expose internal def/use/kill information to a
bundle header - something like this:
BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use>
* %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0;
* %P0<def> = CMPEQri %R16, 0;
Here CMPEQri is a compare to a predicate register instruction, and
LDriuh_cdnNotPt is a _conditional_ load, which might or might not
Take place based on the outcome of t...
2008 Feb 25
6
[PATCH 0/4] ia64/xen: paravirtualization of hand written assembly code
Hi. The patch I send before was too large so that it was dropped from
the maling list. I'm sending again with smaller size.
This patch set is the xen paravirtualization of hand written assenbly
code. And I expect that much clean up is necessary before merge.
We really need the feed back before starting actual clean up as Eddie
already said before.
Eddie discussed how to clean up and suggested
2008 Feb 25
6
[PATCH 0/4] ia64/xen: paravirtualization of hand written assembly code
Hi. The patch I send before was too large so that it was dropped from
the maling list. I'm sending again with smaller size.
This patch set is the xen paravirtualization of hand written assenbly
code. And I expect that much clean up is necessary before merge.
We really need the feed back before starting actual clean up as Eddie
already said before.
Eddie discussed how to clean up and suggested
2008 Mar 28
0
[08/17][PATCH] kvm/ia64: Add interruption vector table for vmm.
...iip /* M */
>+ cover /* B (or nothing) */
>+ ;;
>+ mov r1=sp
>+ ;;
>+ invala /* M */
>+ mov r30=cr.ifs
>+ ;;
>+ addl r1=-VMM_PT_REGS_SIZE,r1
>+ ;;
>+ adds r17=2*L1_CACHE_BYTES,r1 /* really: biggest cache-line
>size */
>+ adds r16=PT(CR_IPSR),r1
>+ ;;
>+ lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES
>+ st8 [r16]=r29 /* save cr.ipsr */
>+ ;;
>+ lfetch.fault.excl.nt1 [r17]
>+ mov r29=b0
>+ ;;
>+ adds r16=PT(R8),r1 /* initialize first base pointer */
>+ adds r17=PT(R9),r1...
2008 Mar 28
0
[08/17][PATCH] kvm/ia64: Add interruption vector table for vmm.
...iip /* M */
>+ cover /* B (or nothing) */
>+ ;;
>+ mov r1=sp
>+ ;;
>+ invala /* M */
>+ mov r30=cr.ifs
>+ ;;
>+ addl r1=-VMM_PT_REGS_SIZE,r1
>+ ;;
>+ adds r17=2*L1_CACHE_BYTES,r1 /* really: biggest cache-line
>size */
>+ adds r16=PT(CR_IPSR),r1
>+ ;;
>+ lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES
>+ st8 [r16]=r29 /* save cr.ipsr */
>+ ;;
>+ lfetch.fault.excl.nt1 [r17]
>+ mov r29=b0
>+ ;;
>+ adds r16=PT(R8),r1 /* initialize first base pointer */
>+ adds r17=PT(R9),r1...
2012 Aug 09
2
[LLVMdev] MI bundle liveness attributes
...to the
instruction.
The value of the output register of an instruction is either the value
of the instruction if it was conditionally executed or the value of the
output register before the instruction.
The Bundle would be:
BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use>,
%R0<imp-use,kill>
* %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0,
%R0<imp-use,kill>
* %P0<def> = CMPEQri %R16, 0
The individual instruction would be:
%R0<def> = LDriuh_cdnNotPt %P0<kill,i...
2012 Aug 10
2
[LLVMdev] MI bundle liveness attributes
...>
> How do we represent a _conditional_ assignment (def) in a bundle MI?
>
> More contents - currently we expose internal def/use/kill information to a
> bundle header - something like this:
>
>
> BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use>
> * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0;
> * %P0<def> = CMPEQri %R16, 0;
>
> Here CMPEQri is a compare to a predicate register instruction, and
> LDriuh_cdnNotPt is a _conditional_ load, which might or might not
> Take plac...
2008 Feb 26
8
[PATCH 0/8] RFC: ia64/xen TAKE 2: paravirtualization of hand written assembly code
Hi. I rewrote the patch according to the comments. I adopted generating
in-place code because it looks the quickest way.
The point Eddie wanted to discuss is how to generate code and its ABI.
i.e. in-place generating v.s. direct jump v.s. indirect function call
Indirect function call doesn't make sense because ivt.S is compiled
multi times. And it is up to pv instances to choose in-place
2008 Feb 26
8
[PATCH 0/8] RFC: ia64/xen TAKE 2: paravirtualization of hand written assembly code
Hi. I rewrote the patch according to the comments. I adopted generating
in-place code because it looks the quickest way.
The point Eddie wanted to discuss is how to generate code and its ABI.
i.e. in-place generating v.s. direct jump v.s. indirect function call
Indirect function call doesn't make sense because ivt.S is compiled
multi times. And it is up to pv instances to choose in-place
2012 Aug 13
0
[LLVMdev] MI bundle liveness attributes
...a _conditional_ assignment (def) in a bundle MI?
> >
> > More contents - currently we expose internal def/use/kill
> information
> > to a bundle header - something like this:
> >
> >
> > BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use>
> > * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0;
> > * %P0<def> = CMPEQri %R16, 0;
> >
> > Here CMPEQri is a compare to a predicate register instruction, and
> > LDriuh_cdnNotPt is a _conditional_ load, which might or...
2012 Aug 09
0
[LLVMdev] MI bundle liveness attributes
...of the output register of an instruction is either the value
> of the instruction if it was conditionally executed or the value of the
> output register before the instruction.
>
> The Bundle would be:
>
> BUNDLE %PC<imp-def>, %R0<imp-def>, %P0<imp-use,kill>, %R16<imp-use>,
> %R0<imp-use,kill>
> * %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0,
> %R0<imp-use,kill>
> * %P0<def> = CMPEQri %R16, 0
>
> The individual instruction would be:
>
> %R0<...
2012 May 11
6
[LLVMdev] Scheduler Roadmap
Dave,
Thank you for your interest. Please see my replies below. Sorry that my
terminology is not as crisp as Andy's, but I think you can see what I mean.
Sergei
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> -----Original Message-----
> From: dag at cray.com [mailto:dag at cray.com]
> Sent: Friday, May 11, 2012 12:14 PM
> To: Sergei Larin
> Cc:
2012 Apr 29
2
SC2, Kubuntu 11.04, Can't Create AI Games & No Maps in List
Hello;
I researched the wine install of SC2 and I was able to correctly mount my DVD drive to read the hidden files on the UDF optical drive. That helped a lot. The install ran perfectly and the patches downloaded/installed with no problems noted.
I can now run SC2, but when I go to single person the screen changes to the one with a list of maps on which I should be able to create a game, but
2008 Apr 30
16
[PATCH 00/15] ia64/pv_ops take 5
Hi. This patchset implements ia64/pv_ops support which is the
framework for virtualization support.
Now all the comments so far have been addressed, but only a few exceptions.
On x86 various ways to support virtualization were proposed, and
eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too.
Later I'll post the patchset which implements xen domU based on
ia64/pv_ops.
2008 Apr 30
16
[PATCH 00/15] ia64/pv_ops take 5
Hi. This patchset implements ia64/pv_ops support which is the
framework for virtualization support.
Now all the comments so far have been addressed, but only a few exceptions.
On x86 various ways to support virtualization were proposed, and
eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too.
Later I'll post the patchset which implements xen domU based on
ia64/pv_ops.
2008 Apr 09
15
[PATCH 00/15] RFC: ia64/pv_ops take 4
Hi. This patchset implements ia64/pv_ops support which is the
framework for virtualization support.
Please review and comments.
On x86 various ways to support virtualization were proposed, and
eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too.
Later I'll post the patchset which implements xen domU based on
ia64/pv_ops. Currently only ia64/xen pv_ops implementation
2008 Apr 09
15
[PATCH 00/15] RFC: ia64/pv_ops take 4
Hi. This patchset implements ia64/pv_ops support which is the
framework for virtualization support.
Please review and comments.
On x86 various ways to support virtualization were proposed, and
eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too.
Later I'll post the patchset which implements xen domU based on
ia64/pv_ops. Currently only ia64/xen pv_ops implementation
2008 May 19
18
[PATCH 00/17] ia64/pv_ops take 6
Hi. This patchset implements ia64/pv_ops support which is the
framework for virtualization support.
Changes from take 5 are rebased to Linux 2.6.26-rc3,
bug fix ivt.S paravirtualization and multi entry point support.
I believe these patches can be applied to the linux ia64 repository.
On x86 various ways to support virtualization were proposed, and
eventually pv_ops won. So on ia64 the pv_ops
2008 May 19
18
[PATCH 00/17] ia64/pv_ops take 6
Hi. This patchset implements ia64/pv_ops support which is the
framework for virtualization support.
Changes from take 5 are rebased to Linux 2.6.26-rc3,
bug fix ivt.S paravirtualization and multi entry point support.
I believe these patches can be applied to the linux ia64 repository.
On x86 various ways to support virtualization were proposed, and
eventually pv_ops won. So on ia64 the pv_ops
2009 Aug 01
3
Low fps or no login on Shaiya
...iverBufferImpl_SetVolumePan (0x215f78,0x215e78): stub
fixme:d3d:debug_d3dformat Unrecognized 909200449 (as fourcc: AL16) WINED3DFORMAT!
fixme:d3d:getFormatDescEntry Can't find format unrecognized(909200449) in the format lookup table
fixme:d3d:debug_d3dformat Unrecognized 909201952 (as fourcc: R16) WINED3DFORMAT!
fixme:d3d:getFormatDescEntry Can't find format unrecognized(909201952) in the format lookup table
fixme:d3d:debug_d3dformat Unrecognized 909200449 (as fourcc: AL16) WINED3DFORMAT!
fixme:d3d:getFormatDescEntry Can't find format unrecognized(909200449) in the format lookup tab...