search for: r154455

...ic last month (see http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-March/048076.html**). The underlying cause is that lui and ori are both 'cheap' instructions. It used to be that cheap instructions would not get hoisted at all during Machine LICM. There was a patch a couple weeks back (r154455) that was a bit more aggressive and will hoist cheap instructions if they don't increase register pressure, but it doesn't help us in this case because lui/ori are a pair of dependent ori instructions. There is a chicken-and-egg problem where neither can be hoisted without the other, a...

On Apr 24, 2012, at 11:48 PM, Fan Dawei wrote: > For the following code fragment, > > ; <label>:27 ; preds = %27, %entry > %28 = load volatile i32* inttoptr (i64 2149581832 to i32*), align 8 > %29 = icmp slt i32 %28, 0 > br i1 %29, label %27, label %loop.exit > > loop.exit: ; preds = %27

For the following code fragment, ; <label>:27 ; preds = %27, %entry %28 = load volatile i32* inttoptr (i64 2149581832 to i32*), align 8 %29 = icmp slt i32 %28, 0 br i1 %29, label %27, label %loop.exit loop.exit: ; preds = %27 llc will generate following MIPS code, $BB0_1: lui $3, 32800 ori $3, $3, 1032 lw