Displaying 2 results from an estimated 2 matches for "r1030".
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1030
2009 Jul 07
1
[LLVMdev] LLVM code target dependent generator question
...ased on the oprand types.
Here is the sample code:
void myFunction( int* src, int* dst, int i )
{
dst[i] = src[i];
i = i + 4;
return;
}
I want to get this translate to my machine code as following:
shl R1028, R1026, 2
add_pointer R1029, R1024, R1028 // incrementing the src pointer
load R1030, R1029
add_pointer R1031, R1025,R1028 // calculating the dst address
store R1030, R1031
mov R1031, 4
add R1032, R1026, R1031 //scalar addition
ret
Currently my ADD instruction is defined in the InstrInfo.td file as following:
def I32RC : RegisterClass<"MyMachine", [i32], 32, [Def...
2009 Jul 07
0
[LLVMdev] LLVM code target dependent generator question
...ased on the oprand types.
Here is the sample code:
void myFunction( int* src, int* dst, int i )
{
dst[i] = src[i];
i = i + 4;
return;
}
I want to get this translate to my machine code as following:
shl R1028, R1026, 2
add_pointer R1029, R1024, R1028 // incrementing the src pointer
load R1030, R1029
add_pointer R1031, R1025,R1028 // calculating the dst address
store R1030, R1031
mov R1031, 4
add R1032, R1026, R1031 //scalar addition
ret
Currently my ADD instruction is defined in the InstrInfo.td file as following:
def I32RC : RegisterClass<"MyMachine", [i32], 32, [Def...