search for: r100c08

...eab2a..033ca0effb7e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c @@ -216,11 +216,30 @@ nv50_fb_init(struct nvkm_fb *base) struct nv50_fb *fb = nv50_fb(base); struct nvkm_device *device = fb->base.subdev.device; + if (!fb->r100c08) { + /* + * We are calling the DMA api way before the TTM layer sets the + * DMA mask based on the MMU subdev parameters. This means we + * are using the default DMA mask of 32, which may cause + * problems on systems with no RAM below the 4 GB mark. So set + * the streaming DMA mask her...

...eab2a..f029aaf01831 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c @@ -216,11 +216,23 @@ nv50_fb_init(struct nvkm_fb *base) struct nv50_fb *fb = nv50_fb(base); struct nvkm_device *device = fb->base.subdev.device; + if (!fb->r100c08) { + dma_addr_t addr = dma_map_page(device->dev, fb->r100c08_page, 0, + PAGE_SIZE, DMA_BIDIRECTIONAL); + if (!dma_mapping_error(device->dev, addr)) { + fb->r100c08 = addr; + } else { + nvkm_warn(&fb->base.subdev, + "dma_map_page() failed on 100c08 page...

...eab2a..f713cb3fe56c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c @@ -216,11 +216,33 @@ nv50_fb_init(struct nvkm_fb *base) struct nv50_fb *fb = nv50_fb(base); struct nvkm_device *device = fb->base.subdev.device; + if (!fb->r100c08) { + /* We are calling the DMA api way before the TTM layer sets the + * DMA mask based on the MMU subdev parameters. This means we + * are using the default DMA mask of 32, which may cause + * problems on systems with no RAM below the 4 GB mark. So set + * the streaming DMA mask here as w...

...eab2a..b2f05f733a53 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c @@ -216,11 +216,30 @@ nv50_fb_init(struct nvkm_fb *base) struct nv50_fb *fb = nv50_fb(base); struct nvkm_device *device = fb->base.subdev.device; + if (!fb->r100c08) { + /* + * We are calling the DMA api way before the TTM layer sets the + * DMA mask based on the MMU subdev parameters. This means we + * are using the default DMA mask of 32, which may cause + * problems on systems with no RAM below the 4 GB mark. So set + * the streaming DMA mask her...

...ocations that the pollers use: So, as the memory location is 32-byte aligned the last 8 bits of the address are uncessary. 100c1c and the others hold 32 bits. So are the missing 24 bits of the address forced to zero or do we need to specify them somewhere? Here is the patch so far, where priv->r100c08 is an address to an empty dma page: diff --git a/nvkm/subdev/fb/nv50.c b/nvkm/subdev/fb/nv50.c index 4150b0d..1a0a94e 100644 --- a/nvkm/subdev/fb/nv50.c +++ b/nvkm/subdev/fb/nv50.c @@ -295,6 +296,19 @@ nv50_fb_init(struct nouveau_object *object) */ nv_w...

...uveau_device *device, bool stall); diff --git a/nvkm/subdev/fb/nv50.c b/nvkm/subdev/fb/nv50.c index 1fc55c1e91a1..7d88e17fa927 100644 --- a/nvkm/subdev/fb/nv50.c +++ b/nvkm/subdev/fb/nv50.c @@ -250,7 +250,9 @@ nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO); if (priv->r100c08_page) { - priv->r100c08 = nv_device_map_page(device, priv->r100c08_page); + priv->r100c08 = dma_map_page(nv_device_base(device), + priv->r100c08_page, 0, PAGE_SIZE, + DMA_BIDIRECTIONAL); if (!priv-...

This v4 is now a 3 piece series, after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In both cases

...> diff --git a/nvkm/subdev/fb/nv50.c b/nvkm/subdev/fb/nv50.c > index 1fc55c1e91a1..7d88e17fa927 100644 > --- a/nvkm/subdev/fb/nv50.c > +++ b/nvkm/subdev/fb/nv50.c > @@ -250,7 +250,9 @@ nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, > > priv->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO); > if (priv->r100c08_page) { > - priv->r100c08 = nv_device_map_page(device, priv->r100c08_page); > + priv->r100c08 = dma_map_page(nv_device_base(device), > + priv->r100c08_page, 0, PAGE_SIZE, > + DMA_BIDI...

(Sending it to the correct Nvidia mailing list, sorry for the spam) Hi, When using acceleration with Nouveau on MacBook Pros with an 9400M (NVAC) card, a PFIFO interrupt 0x00400000 is thrown during the initialisation of that card (sometime after PFIFO and PGRAPH initialisation) and the laptop will lockup [1], forcing users to load Nouveau without acceleration. After some investigation, I found

...ret; + /* Not a clue what this is exactly. Without enabling bit 1 of + * 100c14, system will lockup while initialising the card + * (#27501) + */ + if (nv_device(priv)->chipset == 0xac) { + if ((nv_rd32(priv, 0x100c14) & 0x00000002) == 0x00000000) { + nv_wr32(priv, 0x100c1c, priv->r100c08 >> 8); + nv_mask(priv, 0x100c14, 0x00000000, 0x00000002); + } + } + /* Not a clue what this is exactly. Without pointing it at a * scratch page, VRAM->GART blits with M2MF (as in DDX DFS) * cause IOMMU "read from address 0" errors (rh#561267) -- 2.1.2

This v4 is now a 3 piece series (since v4), after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In

.../drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c index cbc7f00c1278..1fc55c1e91a1 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c @@ -250,10 +250,8 @@ nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO); if (priv->r100c08_page) { - priv->r100c08 = pci_map_page(device->pdev, priv->r100c08_page, - 0, PAGE_SIZE, - PCI_DMA_BIDIRECTIONAL); - if (pci_dma_mapping_error(device->pdev, priv->r100c08)) + priv->r100c08 = nv...

...drm/core/subdev/fb/nvaa.h @@ -0,0 +1 @@ +../../../../nvkm/subdev/fb/nvaa.h \ No newline at end of file diff --git a/nvkm/subdev/fb/nv50.h b/nvkm/subdev/fb/nv50.h index c5e5a88..0b20975 100644 --- a/nvkm/subdev/fb/nv50.h +++ b/nvkm/subdev/fb/nv50.h @@ -9,6 +9,10 @@ struct nv50_fb_priv { dma_addr_t r100c08; }; +#define nv50_fb_create(p,e,c,d,o) \ + nv50_fb_ctor((p), (e), (c), (d), sizeof(**o), \ + (struct nouveau_object **)o) + int nv50_fb_ctor(struct nouveau_object *, struct nouveau_object *, struct nouveau_oclass *, v...

On 12/02/14 05:38, Alexandre Courbot wrote: > Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead > of PCI to which Nouveau is tightly dependent. This patch allows Nouveau > to handle platform devices by: > > - abstracting PCI-dependent functions that were typically used for > resource querying and page mapping, > - introducing a nv_device_is_pci()

Signed-off-by: Pierre Moreau <pierre.morrow at free.fr> --- drm/nouveau_drm.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drm/nouveau_drm.c b/drm/nouveau_drm.c index afb93bb..ffa1e4f 100644 --- a/drm/nouveau_drm.c +++ b/drm/nouveau_drm.c @@ -61,9 +61,10 @@ MODULE_PARM_DESC(debug, "debug string to pass to driver core"); static char

On Mon, Feb 10, 2014 at 8:50 PM, Thierry Reding <thierry.reding at gmail.com> wrote: > On Mon, Feb 10, 2014 at 02:53:00PM +0900, Alexandre Courbot wrote: > [...] >> diff --git a/drivers/gpu/drm/nouveau/core/engine/device/base.c b/drivers/gpu/drm/nouveau/core/engine/device/base.c > [...] >> +resource_size_t >> +nv_device_resource_start(struct nouveau_device *device,

.../drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c index cbc7f00c1278..1fc55c1e91a1 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c @@ -250,10 +250,8 @@ nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO); if (priv->r100c08_page) { - priv->r100c08 = pci_map_page(device->pdev, priv->r100c08_page, - 0, PAGE_SIZE, - PCI_DMA_BIDIRECTIONAL); - if (pci_dma_mapping_error(device->pdev, priv->r100c08)) + priv->r100c08 = nv...

...drm/core/subdev/fb/nvaa.h @@ -0,0 +1 @@ +../../../../nvkm/subdev/fb/nvaa.h \ No newline at end of file diff --git a/nvkm/subdev/fb/nv50.h b/nvkm/subdev/fb/nv50.h index c5e5a88..0b20975 100644 --- a/nvkm/subdev/fb/nv50.h +++ b/nvkm/subdev/fb/nv50.h @@ -9,6 +9,10 @@ struct nv50_fb_priv { dma_addr_t r100c08; }; +#define nv50_fb_create(p,e,c,d,o) \ + nv50_fb_ctor((p), (e), (c), (d), sizeof(**o), \ + (struct nouveau_object **)o) + int nv50_fb_ctor(struct nouveau_object *, struct nouveau_object *, struct nouveau_oclass *, v...

This is more or less simplified series of patches that bring power usage on my NV86 close to that of binary blob. Best regards, Maxim Levitsky

...../../../../nvkm/subdev/fb/nvaa.h > \ No newline at end of file > diff --git a/nvkm/subdev/fb/nv50.h b/nvkm/subdev/fb/nv50.h > index c5e5a88..0b20975 100644 > --- a/nvkm/subdev/fb/nv50.h > +++ b/nvkm/subdev/fb/nv50.h > @@ -9,6 +9,10 @@ struct nv50_fb_priv { > dma_addr_t r100c08; > }; > > +#define nv50_fb_create(p,e,c,d,o) \ > + nv50_fb_ctor((p), (e), (c), (d), sizeof(**o), \ > + (struct nouveau_object **)o) > + > int nv50_fb_ctor(struct nouveau_object...