Displaying 20 results from an estimated 2562 matches for "r1".
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vr1
2016 May 04
4
Conditional tablegen expressions with math ops?
In our generated asm code we've got a constraint such that two registers in
a ternary op have to be in different "banks", best illustrated with an
example:
add r1,r2,r1 # r1 <- r2 + r1
The problem here is that the first operand (the receiver of the value) is
in the same "bank" as the 3rd operand (r1 again). This will cause an extra
cycle to be burned. As it turns out the first and second operands can be in
the same bank, so the issue is with th...
2011 Nov 12
2
[LLVMdev] Thumb-2 code generation error in Apple LLVM at all optimization levels
...t to be held in
floating point register d8. I thought at first it might not be
initialized at all, but upon closer examination I think it may
actually be initialized from a program counter-relative 32-bit .long
constant immediately following my method's code.
.loc 1 388 3
ldr r0, [r5]
ldr r1, [r4, r0]
adds r1, #1
str r1, [r4, r0]
.loc 1 390 64
mov r0, r4
ldr r1, [r6]
blx _objc_msgSend
vmov s0, r0
vmul.f32 d0, d0, d8
vcvt.u32.f32 d0, d0
vmov r0, s0
Ltmp272:
.loc 1 392 9
cmp.w r0, #4000
Ltmp273:
.loc 1 393 13
it hs
blxhs _usleep
cmp.w *looks* like a 16-bit comparison with...
2017 Jul 06
3
Efficient swapping
Thanks a lot, Ista! I really appreciate it.
How about a slightly different case as the following:
set.seed(1)
(tmp <- data.frame(x = 1:10, R1 = sample(LETTERS[1:5], 10, replace =
TRUE), R2 = sample(LETTERS[2:6], 10, replace = TRUE)))
x R1 R2
1 C B
2 B B
3 C E
4 E C
5 E B
6 D E
7 E E
8 D F
9 C D
10 A E
Notice that the factor levels between the two factors, R1 and R2,
slide by one leve...
2008 Mar 18
3
Puzzled at generating combinations
I have two data frames. Suppose the first has rows
r1
r2
r3
and the second has rows
R1
R2
R3
I'd like to generate the data frame:
r1 R1
r1 R2
r1 R3
r2 R1
r2 R2
r2 R3
r3 R1
r3 R2
r3 R3
How would I go about doing this? I'm sure there's a clean way to do it
but I find myself thinking...
2003 May 26
1
help with subset(), still original dataframe in tapply
Dear R-help reader,
it would be great if someone knows what I'm doing wrong.
I have (shorten) dataframe, which consists of a group identification
and a number
>ex
UID REL
1 R1.B8.31 0.000
2 R1.B8.31 0.000
3 R1.B8.31 0.000
4 R1.B8.31 0.000
5 R1.B8.38 0.010
6 R1.B8.38 0.060
7 R1.B8.38 0.006
8 R1.B8.38 0.010
9 R1.B8.48 0.080
10 R1.B8.48 NA
11 R1.B8.48 0.006
I'm creating now a subset missing the values 0 and "NA"
> newex<-subset(ex,ex$REL>...
2017 Jul 06
2
Efficient swapping
Suppose that we have the following dataframe:
set.seed(1)
(tmp <- data.frame(x = 1:10, R1 = sample(LETTERS[1:5], 10, replace =
TRUE), R2 = sample(LETTERS[1:5], 10, replace = TRUE)))
x R1 R2
1 1 B B
2 2 B A
3 3 C D
4 4 E B
5 5 B D
6 6 E C
7 7 E D
8 8 D E
9 9 D B
10 10 A D
I want to do the following: if the difference between the level index
of...
2016 Jan 13
2
Expanding a PseudoOp and accessing the DAG
...-fPIE. In that case we've designated some registers to be
pointers to various address spaces (and our processor is rather complicated
so there are several address spaces).
Right now, given a global variable called 'answer' in C we end up with the
following in the .s file:
movimm r1, %rel(answer) # r1 <- offset to 'answer' symbol
load r1, r1, 0 # r1<-mem[r1+0]
This isn't correct because it should be relative to the GRP register if the
PIE mode is chosen, what I'd like to get is either:
movimm r1, %rel(answer)
addI...
2016 Nov 03
2
rotl: undocumented LLVM instruction?
...0, Register:i64 %vreg0
t4: i64,ch = CopyFromReg t0, Register:i64 %vreg1
t6: i64 = sub t4, Constant:i64<1>
t7: i64 = shl Constant:i64<1>, t6
t9: i64 = xor t7, Constant:i64<-1>
t10: i64 = and t2, t9
t12: ch,glue = CopyToReg t0, Register:i64 %R1, t10
t13: ch = XSTGISD::Ret t12, Register:i64 %R1, t12:1
Combining: t13: ch = XSTGISD::Ret t12, Register:i64 %R1, t12:1
Combining: t12: ch,glue = CopyToReg t0, Register:i64 %R1, t10
Combining: t11: i64 = Register %R1
Combining: t10: i64 = and t2, t9
Combining: t9: i64 = xor t7, Constant:i6...
2006 Mar 15
0
Samba + Cups -> PPD Options problem - 1 attachment
...=&EO;B!S=&%N
M9&%R9#H@(C$V,#`P,#`P(@T**D9#86-H95-I>F4@5DU/<'1I;VX@.B`Q-C`P
M,#`P,`T**DQA;F=U86=E3&5V96PZ("(S(@T**E1H<F]U9VAP=70Z("(U,"(-
M"BI45%)A<W1E<FEZ97(Z(%1Y<&4T,@T**C]45%)A<W1E<FEZ97(Z("(H5'EP
M930R*2`](@T**D-O;&]R1&5V:6-E.B`@5')U90T**D1E9F%U;'1#;VQO<E-P
M86-E.B`@0TU92PT**E9A<FEA8FQE4&%P97)3:7IE.B!4<G5E#0HJ1FEL95-Y
M<W1E;3H@5')U90T**E!R;W1O8V]L<SH@0D-0#0HJ1&5F875L=%)E<V]L=71I
M;VXZ(#8P,&1P:0T*#0HJ)3T]/3T]/3T]/3T]/3T]/3T]/3T]/3T]/3T]/3T]
M/3T]/3T]/3T]/3T]/3T]/3U0<...
2017 Jul 06
0
Efficient swapping
Untested, but I expect that setting the levels to be the same across the
two factors
levels(tmp$R1) <- levels(tmp$R2) <- LETTERS[1:6]
and proceeding as before should be fine.
Best,
Ista
On Jul 6, 2017 6:54 PM, "Gang Chen" <gangchen6 at gmail.com> wrote:
Thanks a lot, Ista! I really appreciate it.
How about a slightly different case as the following:
set.seed(1)
(tmp &...
2016 Nov 03
3
rotl: undocumented LLVM instruction?
...= CopyFromReg t0, Register:i64 %vreg1
>> t6: i64 = sub t4, Constant:i64<1>
>> t7: i64 = shl Constant:i64<1>, t6
>> t9: i64 = xor t7, Constant:i64<-1>
>> t10: i64 = and t2, t9
>> t12: ch,glue = CopyToReg t0, Register:i64 %R1, t10
>> t13: ch = XSTGISD::Ret t12, Register:i64 %R1, t12:1
>>
>>
>>
>> Combining: t13: ch = XSTGISD::Ret t12, Register:i64 %R1, t12:1
>>
>> Combining: t12: ch,glue = CopyToReg t0, Register:i64 %R1, t10
>>
>> Combining: t11: i64 = Register %R1...
2016 Feb 26
6
Reserved/Unallocatable Registers
...eserved registers.
- The rules above do not free us from modeling the instruction effects properly! Instructions writing to PC must be marked as terminators, we need to add barrier flags if we want to restrict the reordering of time stamp counters, ...
== Examples ==
Assume r0 is a normal register r1 is a reserved register:
- We cannot remove the 2nd COPY here because we may read a different value from r1:
r0 = COPY r1
... use v0
r0 = COPY r1
... use v0
- We can remove this COPY because r0 is unused:
r0 = COPY r1
return
- We cannot remove this COPY even if r1 appe...
2018 Jul 26
4
Problem with definition of slist in CFEngine
..."... BEGIN big shit ...............",
# "sys.inet6 .................. = $(sys.inet6)",
# "sys.interfaces_data ........ = $(sys.interfaces_data)",
"... END big shit ...............",
};
reports:
any::
"r1: $(info.info_list)";
"r2: sys.inet6 .................. = $(sys.inet6)";
"r3: sys.interfaces_data ........ = $(sys.interfaces_data)";
"r4: holleri di dudeldoe";
}
The service cfengine3.service is inactive at the moment:
# systemctl is-active...
2017 Jul 06
0
Efficient swapping
How about
foo <- with(list(r1 = tmp$R1,
r2 = tmp$R2,
swapme = (as.numeric(tmp$R1) - as.numeric(tmp$R2)) %% 2 != 0),
{
tmp[swapme, "R1"] <- r2[swapme]
tmp[swapme, "R2"] <- r1[swapme]
tmp
})
Best,
Ista
On Thu, Jul 6, 2017 at 4:06 PM, Gang Chen <gangchen6...
2012 Nov 10
0
[LLVMdev] register scavenger
Hi Reed,
the register scavenger (RS) also keeps track of live registers. This
way it "knows" that the register that was spilled/restored far apart
is available.
Let say you had the following code. You need to find a register to
keep vreg1 and vreg2 in.
R1 = .... // <- RS current liveness state; we have called
RS->forward(It) where It points to here
vreg1 = add SP, 1000
... = load vreg1
... // more code
vreg2 = add SP, 2000
... = load vreg
... = R1
When you come to the definition of vreg1 you (or lets say the
scavengeFrameVirtualRegs function...
2005 Jul 18
5
colnames
Hi,
I have a matrix with column names starting with a character in [0-9]. After some matrix operations (e.g. copy to another matrix), R seems to add a character 'X' in front of the column name. Is this a normal default behaviour of R? Why has it got this behaviour? Can it be changed? What would be the side effect?
Thank you.
Regards,
Gilbert
[[alternative HTML version deleted]]
2010 Feb 18
1
[LLVMdev] Question on selection DAG
Hello,
I want to have an operation foo with variable number of operands, and
I am trying to achieve it using multiple operations. Let's say I want
to have [FOO r1, r2], I am constructing the DAG as follows :
consumeArg(r1) -> consumeArg(r2) -> FOO -> arg(r1) -> arg(r2)
Note that the arrows are all "Chain"s. I need to have consumeArg(r1)
because, I don't want the producer of r1 to be scheduled between FOO
and arg(r1). Similarly I...
2016 Jan 15
2
Expanding a PseudoOp and accessing the DAG
...t; to be pointers to various address spaces (and our processor is rather
>> complicated so there are several address spaces).
>>
>> Right now, given a global variable called 'answer' in C we end up with
>> the following in the .s file:
>>
>> movimm r1, %rel(answer) # r1 <- offset to 'answer' symbol
>> load r1, r1, 0 # r1<-mem[r1+0]
>>
>> This isn't correct because it should be relative to the GRP register if
>> the PIE mode is chosen, what I'd like to get is either:
>>...
2011 Nov 28
1
code problem with the optim() function
...() function. Can
anyone help me take a look at the code?
Thanks in advance.
Best,
Charles
x3<-c(rep(1:2,10),rep(1,5),rep(2,5))
x4<-c(rep(1:2,10),rep(2,5),rep(1,5))
ratings<-as.data.frame(cbind(x3,x4))
ratings <- as.matrix(na.omit(ratings))
ns <- nrow(ratings)
nr <- ncol(ratings)
r1 <- ratings[, 1]
r2 <- ratings[, 2]
if (!is.factor(r1))
r1 <- factor(r1)
if (!is.factor(r2))
r2 <- factor(r2)
ifelse (length(levels(r1)) >= length(levels(r2)),lev <- c(levels(r1),
levels(r2)), lev <- c(levels(r2), levels(r1)))
lev <- lev[!duplicated(lev)]
r1 <- factor(r...
2017 Oct 20
1
[PATCH v1 01/27] x86/crypto: Adapt assembly for PIE support
....
>
>> diff --git a/arch/x86/crypto/aes-x86_64-asm_64.S b/arch/x86/crypto/aes-x86_64-asm_64.S
>> index 8739cf7795de..86fa068e5e81 100644
>> --- a/arch/x86/crypto/aes-x86_64-asm_64.S
>> +++ b/arch/x86/crypto/aes-x86_64-asm_64.S
>> @@ -48,8 +48,12 @@
>> #define R10 %r10
>> #define R11 %r11
>>
>> +/* Hold global for PIE suport */
>> +#define RBASE %r12
>> +
>> #define prologue(FUNC,KEY,B128,B192,r1,r2,r5,r6,r7,r8,r9,r10,r11) \
>> ENTRY(FUNC); \
>> + pushq RBASE;...