search for: qnan

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2018 Mar 01
3
how to simplify FP ops with an undef operand?
...greed.  Those IR instructions are undefined on SNAN, and that undef > could take on an SNAN value.  Folding these instructions to undef > seems reasonable, and it is arguable that you could even fold it to an > ‘unreachable'. fdiv snan, snan is undefined?  As opposed to producing a qnan, as specified by IEEE-754? -Eli -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.l...
2018 Mar 01
0
how to simplify FP ops with an undef operand?
...t;> Agreed. Those IR instructions are undefined on SNAN, and that undef could take on an SNAN value. Folding these instructions to undef seems reasonable, and it is arguable that you could even fold it to an ‘unreachable'. > > fdiv snan, snan is undefined? As opposed to producing a qnan, as specified by IEEE-754? You’re talking about IEEE, I’m talking about LLVM IR. LLVM IR is undefined on SNaNs. It looks like LangRef isn’t clear about this, the only mention of SNaNs is in this statement: "fdiv is not (currently) defined on SNaN’s.” However, fdiv/fmul/etc are p...
2015 Jul 06
5
[LLVMdev] Why can't comparisons with negative zero be simplified?
...754-2008 is that floating-point comparison operations cannot distinguish a negative zero from a positive zero. Further supporting this is that fact that http://llvm.org/docs/LangRef.html describes the difference between "ordered" and "unordered" as pertaining to QNAN operands, with no mention of negative zero. I tried fixing the issue, but then the following test in cast-int-fcmp-eq-0.ll fails: ; CHECK-LABEL: @i32_cast_cmp_oeq_int_n0_uitofp( ; CHECK: uitofp ; CHECK: fcmp oeq define i1 @i32_cast_cmp_oeq_int_n0_uitofp(i32 %i) { %f = uitofp i32 %i to float %...
2015 Jul 29
5
[LLVMdev] [3.7.0] Two late issues with cross compilation to mips
...a problem for most test-suite runs since we can just update the assembler but is causing trouble for microMIPS. More recent toolchains lack the microMIPS multilib I was using and migrating to the new one is causing link failures. These failures are related to ELF header bits specifying the SNaN/QNaN encodings to be IEEE754-1985 or IEEE754-2008 compliant. I suspect the -mnan=2008 isn't reaching the assembler. 3. Clang is incompatible with changes to the mips-mti-linux-gnu sysroot from Imagination's mips-mti-linux-gnu toolchain. Libaries are still multilib'd (albeit with a red...
2019 Oct 08
2
PR43374 - when should comparing NaN values raise a floating point exception?
...; As IR from clang with no optimization, this becomes a bunch of load/store > with: > %cmp = fcmp uno double %conv, %conv1 > > Ok, so far? "fcmp uno" - http://llvm.org/docs/LangRef.html#fcmp-instruction > : > uno: yields true if either operand is a QNAN. why is that ok? here you need an unordered-not-equal, but got an unordered-compare, the former is a silent ieee754 operation the latter is signaling. as noted earlier this is wrong for signaling nans, because any fcmp would signal for them, but the lack of snan support can be forgiven, however...
2010 Sep 09
1
Samba4, DNS, and joining clients
Hi, all, With help from the Samba4/HOWTO and #samba, I was able to set up a Samba 4 domain controller with Bind 9.4.7. It seems to work for the most part. However, my Active Directory DNS never gets entries for any client machines. There is an A record for the DC, but never for any clients. I looked at 'samba_dnsupdate' and see that it gets its input from
2020 Jan 29
3
Floating point semantic modes
...> ideally there would be a way to support snan too. (e.g. isnan(x) cannot be turned into x!=x then) The except_behavior mode is supposed to handle this. The LLVM support for constrained intrinsics is considering all manner of FP exceptions that could be raised, including the distinction between QNaN and SNaN. The default LLVM IR definition does not support this distinction. We seem to have an issue with isnan() in clang though. If you call isnan() you get a call to __isnan() which should be fine (assuming the library does the right thing), but we're translating __builtin_isnan() to x!=x....
2015 Jul 29
0
[LLVMdev] [3.7.0] Two late issues with cross compilation to mips
...est-suite runs since we can just update the > assembler but is causing trouble for microMIPS. More recent toolchains lack > the microMIPS multilib I was using and migrating to the new one is causing > link failures. These failures are related to ELF header bits specifying the > SNaN/QNaN encodings to be IEEE754-1985 or IEEE754-2008 compliant. I suspect > the –mnan=2008 isn't reaching the assembler. > > 3. Clang is incompatible with changes to the mips-mti-linux-gnu > sysroot from Imagination's mips-mti-linux-gnu toolchain. Libaries are still > multilib&...
2015 Jul 29
0
[LLVMdev] [3.7.0] Two late issues with cross compilation to mips
...a problem for most test-suite runs since we can just update the assembler but is causing trouble for microMIPS. More recent toolchains lack the microMIPS multilib I was using and migrating to the new one is causing link failures. These failures are related to ELF header bits specifying the SNaN/QNaN encodings to be IEEE754-1985 or IEEE754-2008 compliant. I suspect the –mnan=2008 isn't reaching the assembler. 3. Clang is incompatible with changes to the mips-mti-linux-gnu sysroot from Imagination's mips-mti-linux-gnu toolchain. Libaries are still multilib'd (albeit with a red...
2015 Jul 29
1
[LLVMdev] [3.7.0] Two late issues with cross compilation to mips
...an just update the > > assembler but is causing trouble for microMIPS. More recent toolchains > lack > > the microMIPS multilib I was using and migrating to the new one is causing > > link failures. These failures are related to ELF header bits specifying the > > SNaN/QNaN encodings to be IEEE754-1985 or IEEE754-2008 compliant. I > suspect > > the –mnan=2008 isn't reaching the assembler. > > > > 3. Clang is incompatible with changes to the mips-mti-linux-gnu > > sysroot from Imagination's mips-mti-linux-gnu toolchain. Libaries...
2014 Sep 16
2
[LLVMdev] Bug 16257 - fmul of undef ConstantExpr not folded to undef
...il.list at gmail.com> wrote: > > Hi Duncan, > > I reread everything we've discussed so far and would like to pay closer attention to the the ARM's FPSCR register mentioned by Stephen. > It's really possible on ARM systems that floating point operations on one or more qNaN operands return a NaN different from the operands. I.e. operand NaN is not propagated. This happens when the "default NaN" flag is set in the FPSCR (floating point status and control register). The result in this case is some default NaN value. > > This means "fadd %x, -0.0&qu...
2014 Sep 10
3
[LLVMdev] Bug 16257 - fmul of undef ConstantExpr not folded to undef
Hi Oleg, On 01/09/14 18:46, Oleg Ranevskyy wrote: > Hi Duncan, > > I looked through the IEEE standard and here is what I found: > > *6.2 Operations with NaNs* > /"For an operation with quiet NaN inputs, other than maximum and minimum > operations, if a floating-point result is to be delivered the result shall be a > quiet NaN which should be one of the
2018 Mar 01
6
how to simplify FP ops with an undef operand?
So you don’t think sNaNs can just be treated as if they were qNaNs? I understand why we would want to ignore the signaling part of things, but the rules for operating on NaNs are pretty clear and reasonable to implement. The signaling aspect can, I think, be safely ignored when we are in the mode of assuming the default FP environment. As for the distinction bet...
2015 Jul 30
2
[LLVMdev] [3.7.0] Two late issues with cross compilation to mips
...a problem for most test-suite runs since we can just update the assembler but is causing trouble for microMIPS. More recent toolchains lack the microMIPS multilib I was using and migrating to the new one is causing link failures. These failures are related to ELF header bits specifying the SNaN/QNaN encodings to be IEEE754-1985 or IEEE754-2008 compliant. I suspect the –mnan=2008 isn't reaching the assembler. > > 3. Clang is incompatible with changes to the mips-mti-linux-gnu sysroot from Imagination's mips-mti-linux-gnu toolchain. Libaries are still multilib'd (albeit...
2012 Dec 17
2
[LLVMdev] max/min intrinsics
...clear > what the behavior of max(-0,+0) and related cases are. The following is our current proposal for llvm.fmax/fmin.*: [1] If exactly one argument is a NaN, the intrinsic returns the other argument. [2] If both arguments are NaN, the intrinsic returns a NaN. [3] An SNaN may behave as a QNaN. [4] If the arguments compare equal, the intrinsic returns a value that compares equal to both arguments. [5] Otherwise, the intrinsic returns the greater/lesser of the two arguments. Rationale and notes: Points [1] and [2] match the C/Posix library functions' specs. Point [3] matche...
2012 Dec 17
0
[LLVMdev] max/min intrinsics
Maybe we can have two versions of the intrinsic function, "ordered" and "unordered", just like fcmp has [1]. Would that work ? [1] - http://llvm.org/docs/LangRef.html#fcmp-instruction On Dec 17, 2012, at 11:14 AM, "Schoedel, Kevin P" <kevin.p.schoedel at intel.com> wrote: > At Monday, December 17, 2012 2:05 PM, Nadav Rotem [mailto:nrotem
2018 Mar 01
0
how to simplify FP ops with an undef operand?
On Feb 28, 2018, at 3:29 PM, Kaylor, Andrew via llvm-dev <llvm-dev at lists.llvm.org> wrote: > For the first part of Sanjay’s question, I think the answer is, “Yes, we can fold all of these to NaN in the general case.” Agreed. Those IR instructions are undefined on SNAN, and that undef could take on an SNAN value. Folding these instructions to undef seems reasonable, and it is arguable
2007 Sep 25
0
[LLVMdev] lli vs JIT diffs on FCmp::ne with NaN operands
I am having a little trouble with the fcmp one instruction on doubles only. For ordered comparisons, the LLVM manual states that true should be returned iff neither operands is QNAN. ( http://llvm.org/docs/LangRef.html#i_fcmp) If I do fcmp one which includes one or both operands as a NaN, the result is expected to be 0 then. If I run the bitcode with lli (JIT off), no problem. If I use the JIT (lli --force-interpreted=true), then it returns 1. (Converely,...
2012 Dec 17
3
[LLVMdev] max/min intrinsics
At Monday, December 17, 2012 2:05 PM, Nadav Rotem [mailto:nrotem at apple.com] wrote: >This part worries me. The new min/max intrinsics will only be useful if we could pattern match cmp/select into them. Yes, that's the obvious alternative. I don't think we have any strong opinion either way, and fcmp/select is certainly easier to implement. -- Kevin Schoedel, Software
2014 Sep 17
3
[LLVMdev] Bug 16257 - fmul of undef ConstantExpr not folded to undef
...n, >>> >>> I reread everything we've discussed so far and would like to pay >>> closer attention to the the ARM's FPSCR register mentioned by Stephen. >>> It's really possible on ARM systems that floating point operations >>> on one or more qNaN operands return a NaN different from the >>> operands. I.e. operand NaN is not propagated. This happens when the >>> "default NaN" flag is set in the FPSCR (floating point status and >>> control register). The result in this case is some default NaN value. &g...