Displaying 2 results from an estimated 2 matches for "pvp1".
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2014 Aug 25
0
[PATCH envytools] docs: Fix some spelling and remove some trailing spaces.
...all :ref:`PGRAPH <graph-intro>` Main engine of the card: 2d, 3d, compute.
+2 NV31:NV98 :ref:`PMPEG <pmpeg>` The PFIFO interface to VPE MPEG2 decoding engine.
NVA0:NVAA
3 NV40:NV84 :ref:`PME <me-fifo>` VPE motion estimation engine.
4 NV41:NV84 :ref:`PVP1 <pvp1>` VPE microcoded vector processor.
@@ -64,10 +64,10 @@ The engines that PFIFO controls on NVC0- are:
===== ========== =========================== ===================================================
Id Present on Name Description...
2014 Aug 25
12
[PATCH envytools] demmio: Add decoding of some MEM_TIMINGS registers for NVC0.
---
rnndb/memory/nvc0_pbfb.xml | 37 ++++++++++++++++++++++++++++++++++---
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/rnndb/memory/nvc0_pbfb.xml b/rnndb/memory/nvc0_pbfb.xml
index 500cea9..e006dbe 100644
--- a/rnndb/memory/nvc0_pbfb.xml
+++ b/rnndb/memory/nvc0_pbfb.xml
@@ -49,23 +49,54 @@
Most bitfields are unknown.
</doc>
<bitfield high="7"