search for: pushfq

Hello llvm-dev list, i am implementing an X86 Machine Pass that at some point needs to push/pop eflags on the stack. This pass is hooked at preRegAlloc and LLVM is 3.7.0. I got two big problems: 1) I didn't found a way to emit a pushfq instruction in a clean way, i.e. with BuildMI(*MBB, MI, DL, TII.get(X86::PUSHF64)). Even if both EFLAGS and RSP are added to the MBB liveins, the Machine Verifier complains saying: *** Bad machine code: Using an undefined physical register *** - function: main - basic block: BB#238 for.inc.1...

...+1388,10 @@ ENTRY(nmi) * resume the outer NMI. */ - movq $repeat_nmi, %rdx + leaq repeat_nmi(%rip), %rdx cmpq 8(%rsp), %rdx ja 1f - movq $end_repeat_nmi, %rdx + leaq end_repeat_nmi(%rip), %rdx cmpq 8(%rsp), %rdx ja nested_nmi_out 1: @@ -1440,7 +1445,8 @@ nested_nmi: pushq %rdx pushfq pushq $__KERNEL_CS - pushq $repeat_nmi + leaq repeat_nmi(%rip), %rdx + pushq %rdx /* Put stack back */ addq $(6*8), %rsp @@ -1479,7 +1485,9 @@ first_nmi: addq $8, (%rsp) /* Fix up RSP */ pushfq /* RFLAGS */ pushq $__KERNEL_CS /* CS */ - pushq $1f /* RIP */ + pushq %rax /* Support...

...9;t need to be written a second time, as the PUSHes above already can/do take care of putting in place the intended values. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -275,15 +275,13 @@ ENTRY(sysenter_entry) pushfq .globl sysenter_eflags_saved sysenter_eflags_saved: - pushq $0 - pushq $0 + pushq $3 /* ring 3 null cs */ + pushq $0 /* null rip */ pushq $0 movl $TRAP_syscall,4(%rsp) SAVE_ALL GET_CURRENT(%rbx) cmpb $0,VCPU_sysent...

..., the state of affair in that area degraded quite significantly, see test/CodeGen/X86/i256-add.ll for instance. Is there some kind of work in progress here and it is expected to get better ? Because if not, that's a big problem. It looks like the problem is that the compiler now choose to use pushfq/popfq in some cases rather than chaining adc to propagate the carry in additions. I hope this can get sorted out quickly. I'm happy to help if that is necessary. Thanks, Amaury SECHET -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pi...

...gt; - movq $repeat_nmi, %rdx > + leaq repeat_nmi(%rip), %rdx > cmpq 8(%rsp), %rdx > ja 1f > - movq $end_repeat_nmi, %rdx > + leaq end_repeat_nmi(%rip), %rdx > cmpq 8(%rsp), %rdx > ja nested_nmi_out > 1: > @@ -1440,7 +1445,8 @@ nested_nmi: > pushq %rdx > pushfq > pushq $__KERNEL_CS > - pushq $repeat_nmi > + leaq repeat_nmi(%rip), %rdx > + pushq %rdx > > /* Put stack back */ > addq $(6*8), %rsp > @@ -1479,7 +1485,9 @@ first_nmi: > addq $8, (%rsp) /* Fix up RSP */ > pushfq /* RFLAGS */ > pushq $__KERNEL_CS /*...

...+1481,10 @@ ENTRY(nmi) * resume the outer NMI. */ - movq $repeat_nmi, %rdx + leaq repeat_nmi(%rip), %rdx cmpq 8(%rsp), %rdx ja 1f - movq $end_repeat_nmi, %rdx + leaq end_repeat_nmi(%rip), %rdx cmpq 8(%rsp), %rdx ja nested_nmi_out 1: @@ -1537,7 +1538,8 @@ nested_nmi: pushq %rdx pushfq pushq $__KERNEL_CS - pushq $repeat_nmi + leaq repeat_nmi(%rip), %rdx + pushq %rdx /* Put stack back */ addq $(6*8), %rsp @@ -1576,7 +1578,9 @@ first_nmi: addq $8, (%rsp) /* Fix up RSP */ pushfq /* RFLAGS */ pushq $__KERNEL_CS /* CS */ - pushq $1f /* RIP */ + pushq %rax /* Support...

...f this on say a defconfig kernel vmlinux with > > paravirt enabled? > > Starting with this patch set applied: > $ make CC=gcc-8 -j46 > $ objdump -d vmlinux | grep native_save_fl --context=3 > ffffffff81059140 <native_save_fl>: > ffffffff81059140: 9c pushfq > ffffffff81059141: 58 pop %rax > ffffffff81059142: c3 retq > $ git checkout HEAD~3 > $ make CC=gcc-8 -j46 > $ objdump -d vmlinux | grep native_save_fl --context=3 > ffffffff81079410 <native_save_fl>: > ffffffff81079410: 9c...

...ile format elf64-x86-64 Disassembly of section .text: 0000000000000000 <bar>: 0: 53 push %rbx 1: e8 00 00 00 00 callq 6 <bar+0x6> 6: ff 0d 00 00 00 00 decl 0x0(%rip) # c <bar+0xc> c: 9c pushfq d: 5b pop %rbx e: e8 00 00 00 00 callq 13 <bar+0x13> 13: b8 01 00 00 00 mov $0x1,%eax 18: 53 push %rbx 19: 9d popfq 1a: 75 07 jne 23 <bar+0x23>...

...%rdx >> ja 1f >> - movq $end_repeat_nmi, %rdx >> + leaq end_repeat_nmi(%rip), %rdx >> cmpq 8(%rsp), %rdx >> ja nested_nmi_out >> 1: >> @@ -1440,7 +1445,8 @@ nested_nmi: >> pushq %rdx >> pushfq >> pushq $__KERNEL_CS >> - pushq $repeat_nmi >> + leaq repeat_nmi(%rip), %rdx >> + pushq %rdx >> >> /* Put stack back */ >> addq $(6*8), %rsp >> @@ -1479,7 +1485,9 @@ first_nmi: >> addq $8, (%rs...

...%rdx >> ja 1f >> - movq $end_repeat_nmi, %rdx >> + leaq end_repeat_nmi(%rip), %rdx >> cmpq 8(%rsp), %rdx >> ja nested_nmi_out >> 1: >> @@ -1440,7 +1445,8 @@ nested_nmi: >> pushq %rdx >> pushfq >> pushq $__KERNEL_CS >> - pushq $repeat_nmi >> + leaq repeat_nmi(%rip), %rdx >> + pushq %rdx >> >> /* Put stack back */ >> addq $(6*8), %rsp >> @@ -1479,7 +1485,9 @@ first_nmi: >> addq $8, (%rs...

...Disassembly of section .text: > > 0000000000000000 <bar>: > 0: 53 push %rbx > 1: e8 00 00 00 00 callq 6 <bar+0x6> > 6: ff 0d 00 00 00 00 decl 0x0(%rip) # c <bar+0xc> > c: 9c pushfq > d: 5b pop %rbx > e: e8 00 00 00 00 callq 13 <bar+0x13> > 13: b8 01 00 00 00 mov $0x1,%eax > 18: 53 push %rbx > 19: 9d popfq > 1a: 75 07 jne...

...t_exception +/* Enable NMIs. No special register assumptions. Only %rax is not preserved. */ +ENTRY(enable_nmis) + movq %rsp, %rax /* Grab RSP before pushing */ + + /* Set up stack frame */ + pushq $0 /* SS */ + pushq %rax /* RSP */ + pushfq /* RFLAGS */ + pushq $__HYPERVISOR_CS /* CS */ + leaq 1f(%rip),%rax + pushq %rax /* RIP */ + + iretq /* Disable the hardware NMI latch */ +1: + retq + +/* No op trap handler. Required for kexec crash path. This is not + * declared wi...

..."; end_" #name ":") +DEF_NATIVE(cli, "cli"); +DEF_NATIVE(sti, "sti"); +/* We push rdi , and pop in rda. This is due to x86_64 calling conventions + * Recall that we are patching a function call */ +DEF_NATIVE(popfq, "pushq %rdi; popfq"); +DEF_NATIVE(pushfq, "pushfq; popq %rax"); +DEF_NATIVE(pushfq_cli, "pushfq; popq %rax; cli"); +DEF_NATIVE(iret, "iretq"); +DEF_NATIVE(sysretq, "sysretq"); +DEF_NATIVE(swapgs, "swapgs"); + +static const struct native_insns +{ + const char *start, *end; +} native_insns[]...

..."; end_" #name ":") +DEF_NATIVE(cli, "cli"); +DEF_NATIVE(sti, "sti"); +/* We push rdi , and pop in rda. This is due to x86_64 calling conventions + * Recall that we are patching a function call */ +DEF_NATIVE(popfq, "pushq %rdi; popfq"); +DEF_NATIVE(pushfq, "pushfq; popq %rax"); +DEF_NATIVE(pushfq_cli, "pushfq; popq %rax; cli"); +DEF_NATIVE(iret, "iretq"); +DEF_NATIVE(sysretq, "sysretq"); +DEF_NATIVE(swapgs, "swapgs"); + +static const struct native_insns +{ + const char *start, *end; +} native_insns[]...

...ile format elf64-x86-64 Disassembly of section .text: 0000000000000000 <bar>: 0: 53 push %rbx 1: e8 00 00 00 00 callq 6 <bar+0x6> 6: ff 0d 00 00 00 00 decl 0x0(%rip) # c <bar+0xc> c: 9c pushfq d: 5b pop %rbx e: e8 00 00 00 00 callq 13 <bar+0x13> 13: b8 01 00 00 00 mov $0x1,%eax 18: 53 push %rbx 19: 9d popfq 1a: 75 07 jne 23 <bar+0x23>...

...stopher Lameter <cl at linux.com> wrote: > On Wed, 14 Mar 2018, Peter Zijlstra wrote: > > On Tue, Mar 13, 2018 at 01:59:24PM -0700, Thomas Garnier wrote: > > > @@ -1576,7 +1578,9 @@ first_nmi: > > > addq $8, (%rsp) /* Fix up RSP */ > > > pushfq /* RFLAGS */ > > > pushq $__KERNEL_CS /* CS */ > > > - pushq $1f /* RIP */ > > > + pushq %rax /* Support Position Independent Code */ > > > + leaq 1f(%rip), %rax /* RIP */ > > > + xchgq %...

...g64) @@ -45,7 +45,7 @@ ENTRY(do_suspend_lowlevel) xorl %eax, %eax call save_processor_state - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq %rsp, pt_regs_sp(%rax) movq %rbp, pt_regs_bp(%rax) movq %rsi, pt_regs_si(%rax) @@ -64,13 +64,14 @@ ENTRY(do_suspend_lowlevel) pushfq popq pt_regs_flags(%rax) - movq $.Lresume_point, saved_rip(%rip) + leaq .Lresume_point(%rip), %rax + movq %rax, saved_rip(%rip) - movq %rsp, saved_rsp - movq %rbp, saved_rbp - movq %rbx, saved_rbx - movq %rdi, saved_rdi - movq %rsi, saved_rsi + movq %rsp, saved_rsp(%rip) + movq %rbp, saved_rb...

...he kernel .text is littered with a bunch of calls to pv_irq_ops function pointers, like: callq *0xffffffff81e3a400 (pv_irq_ops.save_fl) In non-Xen paravirt environments -- including native, KVM, Hyper-V, and VMware -- the above code gets patched by native_patch() to look like this instead: pushfq pop %rax nopl 0x0(%rax,%rax,1) So in most scenarios, there's a mismatch between what vmlinux shows and the actual runtime code. This mismatch hurts debuggability and makes the assembly code harder to understand. It also causes the ORC unwinder to produce KASAN warnings like: BU...

...quite >> significantly, see test/CodeGen/X86/i256-add.ll for instance. >> >> Is there some kind of work in progress here and it is expected to get >> better ? Because if not, that's a big problem. It looks like the problem is >> that the compiler now choose to use pushfq/popfq in some cases rather than >> chaining adc to propagate the carry in additions. >> >> I hope this can get sorted out quickly. I'm happy to help if that is >> necessary. >> >> Thanks, >> >> Amaury SECHET >> > > > _______________...

...ial_insns.h> > #include <linux/stringify.h> > > -DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); > -DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); > -DEF_NATIVE(pv_irq_ops, restore_fl, "pushq %rdi; popfq"); > -DEF_NATIVE(pv_irq_ops, save_fl, "pushfq; popq %rax"); > -DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax"); > -DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax"); > -DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3"); > -DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)"...