search for: push_spac

...++ b/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c @@ -65,14 +65,9 @@ nv50_constbufs_validate(struct nv50_context *nv50) PUSH_DATA (push, (b << 12) | (i << 8) | p | 1); } while (words) { - unsigned nr; - - if (!PUSH_SPACE(push, 16)) - break; - nr = PUSH_AVAIL(push); - assert(nr >= 16); - nr = MIN2(MIN2(nr - 3, words), NV04_PFIFO_MAX_PACKET_LEN); + unsigned nr = MIN2(words, NV04_PFIFO_MAX_PACKET_LEN); + PUSH_SPACE(push, nr +...

On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > This patch looks fine except that it should be a bit more normalized. I > mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for > PUSH_SPACE calls, sometimes you add it sometimes not. Meh. We need to get our error checking situation straight, but this isn't the patch to do it in. > > Did you run a full piglit test this time ? :) Nope, but I ran a full piglit before this patch....

.../10/2015 09:42 PM, Ilia Mirkin wrote: >> >> On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset >> <samuel.pitoiset at gmail.com> wrote: >>> >>> This patch looks fine except that it should be a bit more normalized. I >>> mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for >>> PUSH_SPACE calls, sometimes you add it sometimes not. >> >> Meh. We need to get our error checking situation straight, but this >> isn't the patch to do it in. > > > Yeah, but this needs to be clarified. What does?

.../src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c @@ -575,8 +575,9 @@ nvc0_draw_arrays(struct nvc0_context *nvc0, if (nvc0->state.index_bias) { /* index_bias is implied 0 if !info->indexed (really ?) */ /* TODO: can we deactivate it for the VERTEX_BUFFER_FIRST command ? */ - PUSH_SPACE(push, 1); + PUSH_SPACE(push, 2); IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0); + IMMED_NVC0(push, NVC0_3D(VERTEX_ID), 0); nvc0->state.index_bias = 0; } @@ -705,9 +706,11 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten, prim = nvc0_prim_gl(mode...

But at the time the mesa3d file src/gallium/drivers/nouveau/nv30/nv30_screen.c is called and when the various PUSH_DATA begin to be called there is not yet a call to nouveau_pushbuf_space. So it would generate a seg fault in push->curr. Again, sorry for the confusion and thanks for the reply. Awaiting for an answer if possible. Thanks in advance. 2015-11-02 14:44 GMT-03:00 Ilia Mirkin

...50/nv50_query_hw_sm.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c @@ -176,6 +176,7 @@ nv50_hw_sm_begin_query(struct nv50_context *nv50, struct nv50_hw_query *hq) return false; } + pipe_mutex_lock(screen->base.push_mutex); assert(cfg->num_counters <= 4); PUSH_SPACE(push, 4 * 4); @@ -208,6 +209,7 @@ nv50_hw_sm_begin_query(struct nv50_context *nv50, struct nv50_hw_query *hq) BEGIN_NV04(push, NV50_CP(MP_PM_SET(c)), 1); PUSH_DATA (push, 0); } + pipe_mutex_unlock(screen->base.push_mutex); return true; } @@ -237,6 +239,7 @@ nv50_hw_...

...default: + assert(!"render condition query not a predicate"); + cond = NV50_3D_COND_MODE_ALWAYS; + break; + } + } nv50->cond_query = pq; nv50->cond_cond = condition; + nv50->cond_condmode = cond; nv50->cond_mode = mode; - PUSH_SPACE(push, 9); - if (!pq) { + PUSH_SPACE(push, 2); BEGIN_NV04(push, NV50_3D(COND_MODE), 1); - PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS); + PUSH_DATA (push, cond); return; } - q = nv50_query(pq); - if (mode == PIPE_RENDER_COND_WAIT || - mode == PIPE_REND...

...e starts with a bunch of stuff init'ing objects, and then does: BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1); PUSH_DATA (push, screen->eng3d->handle); And as you can see in nv30_winsys.h: static inline void BEGIN_NV04(struct nouveau_pushbuf *push, int subc, int mthd, int size) { PUSH_SPACE(push, size + 1); PUSH_DATA (push, 0x00000000 | (size << 18) | (subc << 13) | mthd); } and PUSH_SPACE in turn calls nouveau_pushbuf_space. -ilia On Mon, Nov 2, 2015 at 1:36 PM, Daniel Melo Jorge da Cunha <dmjcunha at gmail.com> wrote: > But at the time the mesa3d file &...

...rc/nv50_accel.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/src/nv50_accel.c b/src/nv50_accel.c index 66d6cb8..7c640f2 100644 --- a/src/nv50_accel.c +++ b/src/nv50_accel.c @@ -44,6 +44,9 @@ NV50SyncToVBlank(PixmapPtr ppix, BoxPtr box) if (!crtcs) return; + if (!PUSH_SPACE(push, 10)) + return; + BEGIN_NV04(push, SUBC_NVSW(0x0060), 2); PUSH_DATA (push, pNv->vblank_sem->handle); PUSH_DATA (push, 0); -- 1.7.8.5

...u_fence_wait(struct nouveau_fence *fence) /* wtf, someone is waiting on a fence in flush_notify handler? */ assert(fence->state != NOUVEAU_FENCE_STATE_EMITTING); - if (fence->state < NOUVEAU_FENCE_STATE_EMITTED) + if (fence->state < NOUVEAU_FENCE_STATE_EMITTED) { + PUSH_SPACE(screen->pushbuf, 8); nouveau_fence_emit(fence); + } if (fence->state < NOUVEAU_FENCE_STATE_FLUSHED) if (nouveau_pushbuf_kick(screen->pushbuf, screen->pushbuf->channel)) @@ -224,8 +226,12 @@ nouveau_fence_wait(struct nouveau_fence *fence) void nouveau_fence...

.... > > > On 10/16/2016 02:06 AM, Ilia Mirkin wrote: >> diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c >> index 6add60b..a53dfe6 100644 >> --- a/src/nvc0_exa.c >> +++ b/src/nvc0_exa.c >> @@ -914,14 +914,56 @@ NVC0EXAComposite(PixmapPtr pdpix, >> if (!PUSH_SPACE(push, 64)) >> return; >> >> + if (pNv->dev->chipset >= 0x110) { >> + BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); >> + PUSH_DATA (push, 256); >> + PUSH_DATA (push, (pNv->scratch->offset + P...

...+ + if (data_size == 12) { + /* TODO: Find a way to do this with the GPU! */ + nvc0_clear_buffer_cpu(pipe, res, offset, size, data, data_size); + return; + } + + elements = size / data_size; + + height = (elements + 16383) / 16384; + + width = elements / height; + + if (!PUSH_SPACE(push, 40)) + return; + + PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR); + + BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4); + PUSH_DATAf(push, color.f[0]); + PUSH_DATAf(push, color.f[1]); + PUSH_DATAf(push, color.f[2]); + PUSH_DATAf(push, color.f[3]); + BEGIN_NVC0(p...

...+ + if (data_size == 12) { + // TODO: Find a way to do this with the GPU! + nvc0_clear_buffer_cpu(pipe,res,offset,size,data,data_size); + } + else { + + elements = size / data_size; + + height = (elements + 16383) / 16384; + + width = elements / height; + + if (!PUSH_SPACE(push, 40)) + return; + + PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR); + + BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4); + PUSH_DATAf(push, color.f[0]); + PUSH_DATAf(push, color.f[1]); + PUSH_DATAf(push, color.f[2]); + PUSH_DATAf(push, color.f[...

Hi, please review the following patch! Thanks, Tobias Klausmann

...dec->vpring; + context->clear_render_target(context, (struct pipe_surface *)&surf, &color, 0, 0, 1024, 1); + surf.offset = dec->vpring->size - 0x1000; + context->clear_render_target(context, (struct pipe_surface *)&surf, &color, 0, 0, 1024, 1); + + PUSH_SPACE(screen->pushbuf, 5); + fence_ref[0].bo = dec->fence; + nouveau_pushbuf_refn(screen->pushbuf, fence_ref, 1); + /* The clear_render_target is done via 3D engine, so use it to write to a + * sempahore to indicate that it's done. + */ + BEGIN_NV04(screen-&g...

...urf.width * 4; + mip.base.bo = dec->vpring; + context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); + surf.offset = dec->vpring->size - 0x1000; + context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); + + PUSH_SPACE(screen->pushbuf, 5); + PUSH_REFN(screen->pushbuf, dec->fence, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); + /* The clear_render_target is done via 3D engine, so use it to write to a + * sempahore to indicate that it's done. + */ + BEGIN_NV04(screen->pushbuf, NV50...

...+ default: + assert(!"Unsupported element size"); + return; + } + + assert(size % data_size == 0); + + if (data_size != 12) { + + elements = size / data_size; + + height = (elements + 16383) / 16384; + + width = elements / height; + + if (!PUSH_SPACE(push, 40)) + return; + + PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR); + + BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4); + PUSH_DATAf(push, color.f[0]); + PUSH_DATAf(push, color.f[1]); + PUSH_DATAf(push, color.f[2]); + PUSH_DATAf(push, color.f[...

For all these patches I'd say: testers are welcome. The first three patches seem good enough to push as we speak IMHO (so if you agree, go ahead!), whereas for the fourth I don't know if this is the desired way to fix. The result of these four patches is that NV34 gives a nearly-correct desktop experience, where only some fading animations appear broken. It's quite useable now! [1/4]:

Hello there, This series exposes NVIDIA's global performance counters for Tesla through the Gallium's HUD and the GL_AMD_performance_monitor extension. This adds support for 24 hardware events which have been reverse engineered with PerfKit (Windows) and CUPTI (Linux). These hardware events will allow developers to profile OpenGL applications. To reduce latency and to improve accuracy,

The main patches are from Christoph. Unfortunately they're a little beyond my understanding of all the vertex-related details, but they generally seemed fine. I'm just going to push these unless someone steps up to review them. Christoph Bumiller (2): nvc0: add support for indirect drawing nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS Ilia Mirkin (1): nouveau: check if