Displaying 15 results from an estimated 15 matches for "push64r".
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...the problem is stub created in JIT::runFunction:
Function *Stub = Function::Create(STy, Function::InternalLinkage, "" ...
Here is the log of machine instructions before and after emitEpilogue
for this function:
* PEI::insertPrologEpilogCode: === >> before emitEpilogue
- insn: PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>
- insn: PROLOG_LABEL <MCSym=.Ltmp2>
- insn: %RBP<def> = MOV64rr %RSP
- insn: PROLOG_LABEL <MCSym=.Ltmp3>
- insn: %RDI<def> = MOV64ri64i32 60910096
- insn: %RAX<def> = MOV64ri
<ga:@_ZN010Hello...
2010 Aug 26
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On Aug 26, 2010, at 12:59 PMPDT, Eric Christopher wrote:
> On Aug 26, 2010, at 12:25 PM, Yuri wrote:
>> On 08/26/2010 11:53, Eric Christopher wrote:
>>> Could you get it to print out the instruction when it happens?
>>> (just change the line above the error message to print it out to
>>> errs()).
>>>
>>> It basically means that a pseudo
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...t; JIT::runFunction: Function *Stub = Function::Create(STy,
> Function::InternalLinkage, "" ...
>
> Here is the log of machine instructions before and after
> emitEpilogue for this function:
> * PEI::insertPrologEpilogCode: === >> before emitEpilogue
> - insn: PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>
> - insn: PROLOG_LABEL <MCSym=.Ltmp2>
> - insn: %RBP<def> = MOV64rr %RSP
> - insn: PROLOG_LABEL <MCSym=.Ltmp3>
> - insn: %RDI<def> = MOV64ri64i32 60910096
> - insn: %RAX<def> = MOV64ri
>...
2020 Nov 12
2
LLVM X86 MachineBasicBlock inserting push and pop instructions causes segmentation fault
...empty() || !origMBB->isLegalToHoistInto())
return;
llvm::BuildMI(*origMBB, origMBB->begin(), DebugLoc(),
TII.get(X86::POP64r)).addReg(X86::RCX);
/* SOME ADDITIONAL LOGIC COMMENTED OUT */
llvm::BuildMI(*origMBB, origMBB->begin(), DebugLoc(),
TII.get(X86::PUSH64r)).addReg(X86::RCX);
}
bool VirtualTimeManager::runOnMachineFunction(MachineFunction &MF) {
for (auto &MBB : MF) {
MachineBasicBlock* origMBB = &MBB;
__insertVtlLogic(MF, origMBB);
}
return true;
}
When I compile and run a program (...
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...JIT::runFunction: Function *Stub = Function::Create(STy, Function::InternalLinkage, "" ...
>>
>> Here is the log of machine instructions before and after emitEpilogue for this function:
>> * PEI::insertPrologEpilogCode: === >> before emitEpilogue
>> - insn: PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>
>> - insn: PROLOG_LABEL <MCSym=.Ltmp2>
>> - insn: %RBP<def> = MOV64rr %RSP
>> - insn: PROLOG_LABEL <MCSym=.Ltmp3>
>> - insn: %RDI<def> = MOV64ri64i32 60910096
>> - insn: %RAX<def>...
2015 Apr 28
9
[LLVMdev] RFC: Machine Level IR text-based serialization format
...-
number: 0
name: fact
alignment: 4
regInfo:
....
frameInfo:
....
body:
- bb: 0
llbb: '%0'
successors: [ 'bb#2', 'bb#1' ]
liveIns: [ '%edi' ]
instructions:
- 'push64r undef %rax, %rsp, %rsp'
- 'mov32mr %rsp, 1, %noreg, 4, %noreg, %edi'
- ....
....
- bb: 1
llbb: '%4'
successors: [ 'bb#2' ]
instructions:
- '%edi = mov32rm %rsp, 1, %noreg, 4, %noreg'...
2012 Mar 02
0
[LLVMdev] how to annotate assembler
...nternal "-mllvm -show-mc-inst" option is probably as close as you can get.
$ clang -S -O0 test.c -mllvm -show-mc-inst -o -
_test: ## @test
.cfi_startproc
## BB#0: ## %entry
pushq %rbp ## <MCInst #2120 PUSH64r
## <MCOperand Reg:106>>
Ltmp2:
.cfi_def_cfa_offset 16
Ltmp3:
.cfi_offset %rbp, -16
movq %rsp, %rbp ## <MCInst #1491 MOV64rr
## <MCOperand Reg:106>...
2012 Mar 02
3
[LLVMdev] how to annotate assembler
Hi,
In GCC there is one useful option -dp (or -dP for more verbose output)
to annotate assembler with instruction patterns, that was used when
assembler was generated. For example:
double
test(long long s)
{
return s;
}
gcc -S -dp -O0 test.c
test:
.LFB0:
.cfi_startproc
pushq %rbp # 18 *pushdi2_rex64/1 [length = 1]
.cfi_def_cfa_offset 16
movq %rsp, %rbp # 19 *movdi_1_rex64/2
2015 Apr 28
3
[LLVMdev] RFC: Machine Level IR text-based serialization format
....
>
> frameInfo:
>
> ....
>
> body:
>
> - bb: 0
>
> llbb: '%0'
>
> successors: [ 'bb#2', 'bb#1' ]
>
> liveIns: [ '%edi' ]
>
> instructions:
>
> - 'push64r undef %rax, %rsp, %rsp'
>
> - 'mov32mr %rsp, 1, %noreg, 4, %noreg, %edi'
>
> - ....
>
> ....
>
> - bb: 1
>
> llbb: '%4'
>
> successors: [ 'bb#2' ]
>
> instructions:
&...
2020 Nov 12
0
LLVM X86 MachineBasicBlock inserting push and pop instructions causes segmentation fault
...lToHoistInto())
> return;
> llvm::BuildMI(*origMBB, origMBB->begin(), DebugLoc(),
> TII.get(X86::POP64r)).addReg(X86::RCX);
> /* SOME ADDITIONAL LOGIC COMMENTED OUT */
> llvm::BuildMI(*origMBB, origMBB->begin(), DebugLoc(),
> TII.get(X86::PUSH64r)).addReg(X86::RCX);
> }
> bool VirtualTimeManager::runOnMachineFunction(MachineFunction &MF) {
> for (auto &MBB : MF) {
> MachineBasicBlock* origMBB = &MBB;
> __insertVtlLogic(MF, origMBB);
> }
> return true;
&g...
2015 Apr 29
3
[LLVMdev] RFC: Machine Level IR text-based serialization format
...0
>>>
>>> llbb: '%0'
>>>
>>> successors: [ 'bb#2', 'bb#1' ]
>>>
>>> liveIns: [ '%edi' ]
>>>
>>> instructions:
>>>
>>> - 'push64r undef %rax, %rsp, %rsp'
>>>
>>> - 'mov32mr %rsp, 1, %noreg, 4, %noreg, %edi'
>>>
>>> - ....
>>>
>>> ....
>>>
>>> - bb: 1
>>>
>>> llbb: '%4'...
2017 Apr 27
4
-msave-args backend support for x86_64
...etCallingConv(), STI);
+ unsigned arg_size = Fn->arg_size();
+ unsigned RI = 0;
+ int64_t SaveSize = 0;
+
+ for (MCPhysReg Reg : GPRs) {
+ if (++RI > arg_size)
+ break;
+
+ SaveSize += SlotSize;
+
+#if 1
+ BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
+ .addReg(Reg)
+ .setMIFlag(MachineInstr::FrameSetup);
+#else
+ // MOV64mr Reg, -SaveSize(%rbp)
+ addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)),
+ FramePtr, true, -SaveSize)
+ .addReg(Reg)
+ .setMIFlag(MachineIn...
2012 Mar 02
2
[LLVMdev] how to annotate assembler
...tion is probably as close as you can get.
>
> $ clang -S -O0 test.c -mllvm -show-mc-inst -o -
> _test: ## @test
> .cfi_startproc
> ## BB#0: ## %entry
> pushq %rbp ## <MCInst #2120 PUSH64r
> ## <MCOperand Reg:106>>
> Ltmp2:
> .cfi_def_cfa_offset 16
> Ltmp3:
> .cfi_offset %rbp, -16
> movq %rsp, %rbp ## <MCInst #1491 MOV64rr
> ## <MCOp...
2015 Apr 28
2
[LLVMdev] RFC: Machine Level IR text-based serialization format
....
>
> frameInfo:
>
> ....
>
> body:
>
> - bb: 0
>
> llbb: '%0'
>
> successors: [ 'bb#2', 'bb#1' ]
>
> liveIns: [ '%edi' ]
>
> instructions:
>
> - 'push64r undef %rax, %rsp, %rsp'
>
> - 'mov32mr %rsp, 1, %noreg, 4, %noreg, %edi'
>
>
> Hi Alex,
>
> I think this looks promising. What are the 1 an 4 above? How are you
> proposing to serialize operand flags (dead, etc.)?
>
> -Hal
>
Hi Hal,
The 1 and 4...
2010 Aug 27
3
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...:Create(STy,
>>> Function::InternalLinkage, "" ...
>>>
>>> Here is the log of machine instructions before and after
>>> emitEpilogue for this function:
>>> * PEI::insertPrologEpilogCode: === >> before emitEpilogue
>>> - insn: PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>
>>> - insn: PROLOG_LABEL <MCSym=.Ltmp2>
>>> - insn: %RBP<def> = MOV64rr %RSP
>>> - insn: PROLOG_LABEL <MCSym=.Ltmp3>
>>> - insn: %RDI<def> = MOV64ri64i32 60910096
>>> - in...