Displaying 6 results from an estimated 6 matches for "punpcklqdq".
2010 Aug 31
0
[LLVMdev] "equivalent" .ll files diverge after optimizations are applied
...field-by-field while the
failing code has lowered this to a memcpy. I would certainly expect
the memcpy expansion to be smart enough to avoid using MM registers,
though; that's a serious bug if it isn't.
movd %xmm0, %rax
movd %rax, %mm0
movq2dq %mm0, %xmm1
movq2dq %mm0, %xmm2
punpcklqdq %xmm2, %xmm1 ## xmm1 = xmm1[0],xmm2[0]
movq 16(%rsp), %rax
movd %rax, %mm0
movq2dq %mm0, %xmm0
punpcklqdq %xmm2, %xmm0 ## xmm0 = xmm0[0],xmm2[0]
On Aug 31, 2010, at 11:18 AMPDT, Argyrios Kyrtzidis wrote:
> Hi,
>
> I've attached 2 .ll files which are supposed to be equivale...
2010 Aug 31
2
[LLVMdev] "equivalent" .ll files diverge after optimizations are applied
...e failing code has lowered this to a memcpy. I would certainly expect the memcpy expansion to be smart enough to avoid using MM registers, though; that's a serious bug if it isn't.
>
> movd %xmm0, %rax
> movd %rax, %mm0
> movq2dq %mm0, %xmm1
> movq2dq %mm0, %xmm2
> punpcklqdq %xmm2, %xmm1 ## xmm1 = xmm1[0],xmm2[0]
> movq 16(%rsp), %rax
> movd %rax, %mm0
> movq2dq %mm0, %xmm0
> punpcklqdq %xmm2, %xmm0 ## xmm0 = xmm0[0],xmm2[0]
>
>
> On Aug 31, 2010, at 11:18 AMPDT, Argyrios Kyrtzidis wrote:
>
>> Hi,
>>
>> I've a...
2010 Aug 31
5
[LLVMdev] "equivalent" .ll files diverge after optimizations are applied
...raphicsContextPlatformPrivateERKNS_9FloatRectERNS_10FloatPointES8_
movss 8(%rsp), %xmm0
movss 12(%rsp), %xmm1
subss 20(%rsp), %xmm1
subss 16(%rsp), %xmm0
insertps $16, %xmm1, %xmm0 ## xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
movd %xmm0, %rax
movd %rax, %mm0
movq2dq %mm0, %xmm1
movq2dq %mm0, %xmm2
punpcklqdq %xmm2, %xmm1 ## xmm1 = xmm1[0],xmm2[0]
movq 16(%rsp), %rax
movd %rax, %mm0
movq2dq %mm0, %xmm0
punpcklqdq %xmm2, %xmm0 ## xmm0 = xmm0[0],xmm2[0]
addq $24, %rsp
ret
2010 Aug 31
0
[LLVMdev] "equivalent" .ll files diverge after optimizations are applied
...I would certainly
>> expect the memcpy expansion to be smart enough to avoid using MM
>> registers, though; that's a serious bug if it isn't.
>>
>> movd %xmm0, %rax
>> movd %rax, %mm0
>> movq2dq %mm0, %xmm1
>> movq2dq %mm0, %xmm2
>> punpcklqdq %xmm2, %xmm1 ## xmm1 = xmm1[0],xmm2[0]
>> movq 16(%rsp), %rax
>> movd %rax, %mm0
>> movq2dq %mm0, %xmm0
>> punpcklqdq %xmm2, %xmm0 ## xmm0 = xmm0[0],xmm2[0]
>>
>>
>> On Aug 31, 2010, at 11:18 AMPDT, Argyrios Kyrtzidis wrote:
>>
>>>...
2013 Oct 15
0
[LLVMdev] [llvm-commits] r192750 - Enable MI Sched for x86.
...--- llvm/trunk/test/CodeGen/X86/vec_shuffle-39.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-39.ll Tue Oct 15 18:33:07 2013
>> @@ -54,8 +54,8 @@ entry:
>> define <2 x double> @t3() nounwind readonly {
>> bb:
>> ; CHECK-LABEL: t3:
>> -; CHECK: punpcklqdq %xmm1, %xmm0
>> ; CHECK: movq (%rax), %xmm1
>> +; CHECK: punpcklqdq %xmm2, %xmm0
>> ; CHECK: movsd %xmm1, %xmm0
>> %tmp0 = load i128* null, align 1
>> %tmp1 = load <2 x i32>* undef, align 8
>> @@ -72,9 +72,9 @@ bb:
>> define <2 x i64> @t4()...
2014 Apr 08
9
[LLVMdev] 3.4.1 Release Plans
Tom (and Andy, Owen, Evan, Nadav),
I'd like the following commits placed into the 3.4.1 branch. I've attempted to sort this list by code owner:
Andrew Trick:
r203719 - PR17473
r203725 - This test need the X86 backend, move it to the X86 sub directory. [adjusts the test location from r203719]
r202273 - Fix PR18165: LSR must avoid scaling factors that exceed the limit on truncated use.