search for: ptrval

...ts.h" #include "llvm/Support/type_traits.h" Do you actually need all of these includes? PointerLikeTypeTraits doesn't seem necessary. Is type_traits? enum { BufferSize = 32, BufferSize is dead. /// Add a pointer value template<typename T> void add(const T *PtrVal) { addImpl( reinterpret_cast<const uint32_t *>(&PtrVal), reinterpret_cast<const uint32_t *>(&PtrVal + 1)); } This violates TBAA rules and looks pretty dangerous to expose as public API. Is this really needed? Also, addImpl is dereferencing the pointers a...

On Mon, Feb 13, 2012 at 1:22 AM, Jay Foad <jay.foad at gmail.com> wrote: > On 13 February 2012 00:59, Talin <viridia at gmail.com> wrote: > > Here's my latest version of Hashing.h, which I propose to add to > llvm/ADT. > > Comments welcome and encouraged. > > > /// Adapted from MurmurHash2 by Austin Appleby > > Just out of curiosity, why not

...eTraits doesn't > seem necessary. Is type_traits? > > Ooops, this was a cut & paste error from FoldingSet.cpp. > enum { > BufferSize = 32, > > BufferSize is dead. > > > /// Add a pointer value > template<typename T> > void add(const T *PtrVal) { > addImpl( > reinterpret_cast<const uint32_t *>(&PtrVal), > reinterpret_cast<const uint32_t *>(&PtrVal + 1)); > } > > This violates TBAA rules and looks pretty dangerous to expose as public > API. Is this really needed? Also, addIm...

On Feb 14, 2012, at 10:47 PM, Talin wrote: > /// Add a pointer value > template<typename T> > void add(const T *PtrVal) { > addImpl( > reinterpret_cast<const uint32_t *>(&PtrVal), > reinterpret_cast<const uint32_t *>(&PtrVal + 1)); > } > > This violates TBAA rules and looks pretty dangerous to expose as public API. Is this really needed? Also, addImpl i...

...insertelement or extractvalue instructions. I am writing a translation routine from llvm to a non-deterministic language and want to include array bounds check in it. The array size gets printed as part of the type of the value <pty> <result> = getelementptr inbounds <pty>* <ptrval> (ty idx) I am wrongly expecting I.getOperand(0)->getType()->getNumElements() to give me the array size (after casting ptrval to array type) I am not getting the array size, I am getting a value of zero. Can someone point out to me how to get array size (number of elements in the array)...

...ue*, llvm::Twine const&, llvm::Instruction*) + 57 7 opt 0x0873124d llvm::BitCastInst::BitCastInst(llvm::Value*, llvm::Type const*, llvm::Twine const&, llvm::Instruction*) + 65 I insert extra two instructions to a byte code, the corresponding code is quite simple: LoadInst* ptrVal = new LoadInst(ptr, "foobar", false, next); CastInst* ptrCast = new BitCastInst(ptrVal, charPtrType, "cast1", next); If I comment out the CastInst statement, it runs fine. Any hint what is wrong? Thanks, Neal -------------- next part -------------- An HTML attachment was scrubb...

Hi all, In the language specifications, many instructions have this form: <result> = ... So, where is "<result>" defined? Is it an integral part of an instruction? Consider the "getelementptr" instruction: <result> = getelementptr <pty>* <ptrval>{, <ty> <idx>}* How is the "<result>" represented? Best, Xiaolong

...psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 24 pages/cpu @ (ptrval) s60712 r8192 d29400 u98304 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2024064 [ 0.000000] Kernel command line: console=ttyS0,115200n8 root=UUID=7388bb07-be26-4f1d-a11c-48675d650192 rw rootfstype=ext4 rootwait [ 0.000000]...

...8.241115] nouveau 57000000.gpu: Linked as a consumer to regulator.31 [ 8.247889] nouveau 57000000.gpu: NVIDIA GK20A (0ea000a1) [ 8.253396] nouveau 57000000.gpu: imem: using IOMMU [ 8.270210] Unable to handle kernel NULL pointer dereference at virtual address 0000006c [ 8.278340] pgd = (ptrval) [ 8.281250] [0000006c] *pgd=00000000 [ 8.284944] Internal error: Oops: 5 [#1] PREEMPT SMP ARM [ 8.290260] Modules linked in: nouveau(+) ttm [ 8.294625] CPU: 2 PID: 203 Comm: systemd-udevd Not tainted 4.20.0- rc5-next-20181207-00008-g85b0f8e25f86-dirty #110 [ 8.305055] Hardware name:...

...gt; > Do you actually need all of these includes?  PointerLikeTypeTraits doesn't > seem necessary.  Is type_traits? > >   enum { >     BufferSize = 32, > > BufferSize is dead. > > >  /// Add a pointer value >   template<typename T> >   void add(const T *PtrVal) { >     addImpl( >         reinterpret_cast<const uint32_t *>(&PtrVal), >         reinterpret_cast<const uint32_t *>(&PtrVal + 1)); >   } > > This violates TBAA rules and looks pretty dangerous to expose as public API. >  Is this really needed?  Also, addIm...

...specifications, many instructions have this form: > >  <result> = ... > > So, where is "<result>" defined? Is it an integral part of an instruction? > Consider the "getelementptr" instruction: > >  <result> = getelementptr <pty>* <ptrval>{, <ty> <idx>}* > > How is the "<result>" represented? > > Best, > Xiaolong > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/...

...psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 24 pages/cpu @ (ptrval) s60712 r8192 d29400 u98304 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2024064 [ 0.000000] Kernel command line: console=ttyS0,115200n8 root=UUID=7388bb07-be26-4f1d-a11c-48675d650192 rw rootfstype=ext4 rootwait [ 0.000000]...

...e QCD Optimization and Polytopic Representations of Distributed Memory](https://tel.archives-ouvertes.fr/tel-01078440). In particular, Chapter 9 contains a detailed discussion. # Representations ## Intrinsic ### Syntax ``` <result> = llvm.multidim.array.index.* <ty> <ty>* <ptrval> {<stride>, <idx>}* ``` ### Overview: The `llvm.multidim.array.index.*` intrinsic is used to get the address of an element from an array. It performs address calcuation only and does not access memory. It is similar to `getelementptr`. However, it imposes additional semantics which...

...; > regulator.31 > > [ 8.247889] nouveau 57000000.gpu: NVIDIA GK20A (0ea000a1) > > [ 8.253396] nouveau 57000000.gpu: imem: using IOMMU > > [ 8.270210] Unable to handle kernel NULL pointer dereference at > > virtual address 0000006c > > [ 8.278340] pgd = (ptrval) > > [ 8.281250] [0000006c] *pgd=00000000 > > [ 8.284944] Internal error: Oops: 5 [#1] PREEMPT SMP ARM > > [ 8.290260] Modules linked in: nouveau(+) ttm > > [ 8.294625] CPU: 2 PID: 203 Comm: systemd-udevd Not tainted 4.20.0- > > rc5-next-20181207-00008-g85b...

...0.000000] CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35212 r8192 d22132 u65536 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 260096 [ 0.000000] Kernel command line: root=/dev/sda2 rw rootfstype=ext4 rootwait console=ttyS0,115200n8 [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.00000...

...ory](https://tel.archives-ouvertes.fr/tel-01078440). > In particular, Chapter 9 contains a detailed discussion. > > # Representations > > ## Intrinsic > > ### Syntax > ``` > <result> = llvm.multidim.array.index.* <ty> <ty>* <ptrval> {<stride>, <idx>}* > ``` > > ### Overview: > > The `llvm.multidim.array.index.*` intrinsic is used to get the address of > an element from an array. It performs address calcuation only and > does not access memory. It is similar to `getelemen...

...0.000000] CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35148 r8192 d22196 u65536 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 260096 [ 0.000000] Kernel command line: root=/dev/sda2 rw rootfstype=ext4 rootwait console=ttyS0,115200n8 [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.00000...

...//tel.archives-ouvertes.fr/tel-01078440). >> In particular, Chapter 9 contains a detailed discussion. >> >> # Representations >> >> ## Intrinsic >> >> ### Syntax >> ``` >> <result> = llvm.multidim.array.index.* <ty> <ty>* <ptrval> {<stride>, <idx>}* >> ``` >> >> ### Overview: >> >> The `llvm.multidim.array.index.*` intrinsic is used to get the address of >> an element from an array. It performs address calcuation only and >> does not access memory. It is similar to `g...

...tect whether to use the aligned vs. unaligned hashing routine. On Wed, Feb 15, 2012 at 12:01 PM, Chris Lattner <clattner at apple.com> wrote: > On Feb 14, 2012, at 10:47 PM, Talin wrote: > > /// Add a pointer value >> template<typename T> >> void add(const T *PtrVal) { >> addImpl( >> reinterpret_cast<const uint32_t *>(&PtrVal), >> reinterpret_cast<const uint32_t *>(&PtrVal + 1)); >> } >> >> This violates TBAA rules and looks pretty dangerous to expose as public >> API. Is this...

...01078440).>> In particular, Chapter 9 contains a detailed discussion. >>> >>> # Representations >>> >>> ## Intrinsic >>> >>> ### Syntax >>> ``` >>> <result> = llvm.multidim.array.index.* <ty> <ty>* <ptrval> {<stride>, <idx>}* >>> ``` >>> >>> ### Overview: >>> >>> The `llvm.multidim.array.index.*` intrinsic is used to get the address of >>> an element from an array. It performs address calcuation only and >>> does not access...