search for: pt_regs_si

...t; +++ b/arch/x86/power/hibernate_asm_64.S > @@ -24,7 +24,7 @@ > #include <asm/frame.h> > > ENTRY(swsusp_arch_suspend) > - movq $saved_context, %rax > + leaq saved_context(%rip), %rax > movq %rsp, pt_regs_sp(%rax) > movq %rbp, pt_regs_bp(%rax) > movq %rsi, pt_regs_si(%rax) > @@ -115,7 +115,7 @@ ENTRY(restore_registers) > movq %rax, %cr4; # turn PGE back on > > /* We don't restore %rax, it must be 0 anyway */ > - movq $saved_context, %rax > + leaq saved_context(%rip), %rax > movq pt_regs_sp(%rax), %rsp > movq pt_regs_bp(%ra...

...t; +++ b/arch/x86/power/hibernate_asm_64.S > @@ -24,7 +24,7 @@ > #include <asm/frame.h> > > ENTRY(swsusp_arch_suspend) > - movq $saved_context, %rax > + leaq saved_context(%rip), %rax > movq %rsp, pt_regs_sp(%rax) > movq %rbp, pt_regs_bp(%rax) > movq %rsi, pt_regs_si(%rax) > @@ -115,7 +115,7 @@ ENTRY(restore_registers) > movq %rax, %cr4; # turn PGE back on > > /* We don't restore %rax, it must be 0 anyway */ > - movq $saved_context, %rax > + leaq saved_context(%rip), %rax > movq pt_regs_sp(%rax), %rsp > movq pt_regs_bp(%ra...

...100644 --- a/arch/x86/power/hibernate_asm_64.S +++ b/arch/x86/power/hibernate_asm_64.S @@ -24,7 +24,7 @@ #include <asm/frame.h> ENTRY(swsusp_arch_suspend) - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq %rsp, pt_regs_sp(%rax) movq %rbp, pt_regs_bp(%rax) movq %rsi, pt_regs_si(%rax) @@ -115,7 +115,7 @@ ENTRY(restore_registers) movq %rax, %cr4; # turn PGE back on /* We don't restore %rax, it must be 0 anyway */ - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq pt_regs_sp(%rax), %rsp movq pt_regs_bp(%rax), %rbp movq pt_regs_si(%rax), %rsi -...

...t; #include <asm/frame.h> > > > > ENTRY(swsusp_arch_suspend) > > - movq $saved_context, %rax > > + leaq saved_context(%rip), %rax > > movq %rsp, pt_regs_sp(%rax) > > movq %rbp, pt_regs_bp(%rax) > > movq %rsi, pt_regs_si(%rax) > > @@ -115,7 +115,7 @@ ENTRY(restore_registers) > > movq %rax, %cr4; # turn PGE back on > > > > /* We don't restore %rax, it must be 0 anyway */ > > - movq $saved_context, %rax > > + leaq saved_context(%rip), %rax > &gt...

...%rax + movq saved_rip(%rip), %rax jmp *%rax ENDPROC(wakeup_long64) @@ -45,7 +45,7 @@ ENTRY(do_suspend_lowlevel) xorl %eax, %eax call save_processor_state - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq %rsp, pt_regs_sp(%rax) movq %rbp, pt_regs_bp(%rax) movq %rsi, pt_regs_si(%rax) @@ -64,13 +64,14 @@ ENTRY(do_suspend_lowlevel) pushfq popq pt_regs_flags(%rax) - movq $.Lresume_point, saved_rip(%rip) + leaq .Lresume_point(%rip), %rax + movq %rax, saved_rip(%rip) - movq %rsp, saved_rsp - movq %rbp, saved_rbp - movq %rbx, saved_rbx - movq %rdi, saved_rdi - movq %rsi...

Changes: - patch v3: - Update on message to describe longer term PIE goal. - Minor change on ftrace if condition. - Changed code using xchgq. - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace

Changes: - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace implementation. - Use gcc mstack-protector-guard-reg=%gs with PIE when possible. - rfc v3: - Use --emit-relocs instead of -pie to reduce

Changes: - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace implementation. - Use gcc mstack-protector-guard-reg=%gs with PIE when possible. - rfc v3: - Use --emit-relocs instead of -pie to reduce

These patches make the changes necessary to build the kernel as Position Independent Executable (PIE) on x86_64. A PIE kernel can be relocated below the top 2G of the virtual address space. It allows to optionally extend the KASLR randomization range from 1G to 3G. Thanks a lot to Ard Biesheuvel & Kees Cook on their feedback on compiler changes, PIE support and KASLR in general. Thanks to

These patches make the changes necessary to build the kernel as Position Independent Executable (PIE) on x86_64. A PIE kernel can be relocated below the top 2G of the virtual address space. It allows to optionally extend the KASLR randomization range from 1G to 3G. Thanks a lot to Ard Biesheuvel & Kees Cook on their feedback on compiler changes, PIE support and KASLR in general. Thanks to

Changes: - patch v1: - Simplify ftrace implementation. - Use gcc mstack-protector-guard-reg=%gs with PIE when possible. - rfc v3: - Use --emit-relocs instead of -pie to reduce dynamic relocation space on mapped memory. It also simplifies the relocation process. - Move the start the module section next to the kernel. Remove the need for -mcmodel=large on modules. Extends

Changes: - patch v1: - Simplify ftrace implementation. - Use gcc mstack-protector-guard-reg=%gs with PIE when possible. - rfc v3: - Use --emit-relocs instead of -pie to reduce dynamic relocation space on mapped memory. It also simplifies the relocation process. - Move the start the module section next to the kernel. Remove the need for -mcmodel=large on modules. Extends