Displaying 3 results from an estimated 3 matches for "pt_emu_reg_grp_tbl".
2009 Jul 31
8
[PATCH][ioemu] support the assignment of the VF of Intel 82599 10GbE Controller
...v->device_id == PCI_DEVICE_ID_INTEL_82599_VF)
+ return 1;
+ break;
+ }
+
+ return 0;
+}
+
/* initialize emulate register group */
static int pt_config_init(struct pt_dev *ptdev)
{
@@ -2424,6 +2443,9 @@ static int pt_config_init(struct pt_dev *ptdev)
{
if (pt_emu_reg_grp_tbl[i].grp_id != 0xFF)
{
+ if (pt_hide_dev_cap(ptdev->pci_dev, pt_emu_reg_grp_tbl[i].grp_id))
+ continue;
+
reg_grp_offset = (uint32_t)find_cap_offset(ptdev->pci_dev,
pt_emu_reg_grp_tbl[i].grp_id);
if (...
2008 Jun 27
32
[PATCH][RFC] Support more Capability Structures and Device Specific
I am submitting the patch which supports more Capability Structures
and Device Specific Registers for passthrough device.
In Xen 3.3 unstable, qemu-dm supports Configuration Header, MSI
Capability Structure, and MSI-X Capability Structure. But qemu-dm does
not support PCI Express Capability Structure, Device Specific
Registers, etc (writing them is ignored).
To support various I/O devices, I
2011 Nov 27
5
[PATCH] qemu-xen: Intel GPU passthrough, fix OpRegion mapping.
The OpRegion shouldn''t be mapped 1:1 because the address in the host
can''t be used in the guest directly.
This patch traps read and write access to the opregion of the Intel
GPU config space (offset 0xfc).
To work correctly this patch needs a change in hvmloader.
HVMloader will allocate 2 pages for the OpRegion and write this address
on the config space of the Intel GPU. Qemu