Displaying 3 results from an estimated 3 matches for "psubd".
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psub
2004 Sep 10
2
An assembly optimization and fix
...est ecx, ecx
+ jz near .data_len_is_0
+
+ mov ebx, [esp + 36] ; ebx = data[]
+ movd mm3, [ebx - 4] ; mm3 = 0:last_error_0
+ movd mm2, [ebx - 8] ; mm2 = 0:data[-2]
+ movd mm1, [ebx - 12] ; mm1 = 0:data[-3]
+ movd mm0, [ebx - 16] ; mm0 = 0:data[-4]
+ movq mm5, mm3 ; mm5 = 0:last_error_0
+ psubd mm5, mm2 ; mm5 = 0:last_error_1
+ punpckldq mm3, mm5 ; mm3 = last_error_1:last_error_0
+ psubd mm2, mm1 ; mm2 = 0:data[-2] - data[-3]
+ psubd mm5, mm2 ; mm5 = 0:last_error_2
+ movq mm4, mm5 ; mm4 = 0:last_error_2
+ psubd mm4, mm2 ; mm4 = 0:last_error_2 - (data[-2] - data[-3])
+ paddd mm4...
2014 Oct 13
2
[LLVMdev] Unexpected spilling of vector register during lane extraction on some x86_64 targets
...%xmm0 # 400680
<__dso_handle+0x8>
400505: vcvtdq2ps %xmm0,%xmm1
400509: vdivps 0x17f(%rip),%xmm1,%xmm1 # 400690
<__dso_handle+0x18>
400511: vcvttps2dq %xmm1,%xmm1
400515: vpmullw 0x183(%rip),%xmm1,%xmm1 # 4006a0
<__dso_handle+0x28>
40051d: vpsubd %xmm1,%xmm0,%xmm0
400521: vmovq %xmm0,%rax
400526: movslq %eax,%rcx
400529: sar $0x20,%rax
40052d: vpextrq $0x1,%xmm0,%rdx
400533: movslq %edx,%rsi
400536: sar $0x20,%rdx
40053a: vmovss 0x4006c0(,%rcx,4),%xmm0
400543: vinsertps $0x10,0x4006c0(,%rax,4),%xmm0,%x...
2013 Oct 15
0
[LLVMdev] [llvm-commits] r192750 - Enable MI Sched for x86.
...ovd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
>> ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
>> -; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
>> ; CHECK: psubw [[PARAM2]], [[PARAM1]]
>> ; CHECK: ret
>>
>> @@ -83,9 +85,10 @@ entry:
>>
>> ; CHECK-LABEL: test_psubd:
>> ; CHECK: callq getFirstParam
>> +; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
>> ; CHECK: callq getSecondParam
>> +; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
>> ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
>> -; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]...