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Hi, I think there are a set of typos in the ATOMIC_LOAD_UMIN_I* and ATOMIC_LOAD_UMAX_I* pseudo-instructions . Specifically, def ATOMIC_LOAD_MIN_I32 : PseudoInst< (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary, [(set GPR:$dst, (atomic_load_min_32 GPR:$ptr, GPR:$val))]>; and def ATOMIC_LOAD_UMIN_I32 : PseudoInst< (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary, [(se...

Thanks. Fixed with r147032. Evan On Dec 16, 2011, at 1:50 AM, George Russell wrote: > Hi, > > I think there are a set of typos in the ATOMIC_LOAD_UMIN_I* and > ATOMIC_LOAD_UMAX_I* > pseudo-instructions . > > Specifically, > > def ATOMIC_LOAD_MIN_I32 : PseudoInst< > (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary, > [(set GPR:$dst, (atomic_load_min_32 GPR:$ptr, GPR:$val))]>; > > and > > def ATOMIC_LOAD_UMIN_I32 : PseudoInst< > (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), No...

...an > > On Dec 16, 2011, at 1:50 AM, George Russell wrote: > >> Hi, >> >> I think there are a set of typos in the ATOMIC_LOAD_UMIN_I* and >> ATOMIC_LOAD_UMAX_I* >> pseudo-instructions . >> >> Specifically, >> >> def ATOMIC_LOAD_MIN_I32 : PseudoInst< >> (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary, >> [(set GPR:$dst, (atomic_load_min_32 GPR:$ptr, GPR:$val))]>; >> >> and >> >> def ATOMIC_LOAD_UMIN_I32 : PseudoInst< >> (outs GPR:$dst),...

...I started with first defining the intrinsic in llvm/include/llvm/IR/intrinsicsARM.td: def int_foo_cmp : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; The second step I did is adding a new pseudo instruction matching that intrinsic in lib/Target/ARM/ARMInstInfo.td: def FOO_CMP : PseudoInst<(outs GPR:$Rd), (ins GPR:$src1, GPR:$src2), IIC_iCMPi, [(set GPR:$Rd, (int_foo_cmp GPR:$src1, GPR:$src2))]>; Now I am a bit lost how to proceed. I want the instrinsic to do a certain comparison chain and want to avoid any optimization on them. Can someone guide me on...