Displaying 9 results from an estimated 9 matches for "promoteinteg".
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promoteinteger
2014 Mar 04
9
[LLVMdev] Upstreaming PNaCl's IR simplification passes
...ively. They would be useful
for any backend that doesn't want to implement varargs or by-value calling
conventions.
* Instruction-level lowering:
* ExpandStructRegs splits up struct values into scalars, removing the
"insertvalue" and "extractvalue" instructions.
* PromoteIntegers legalizes integer types (e.g. i30 is converted to
i32).
* Module-level lowering: This implements, at the IR level, functionality
that is traditionally provided by "ld". e.g. ExpandCtors lowers
llvm.global_ctors to the __init_array_start and __init_array_end symbols
that are used by...
2009 Feb 02
1
[LLVMdev] type legalizer promoting BUILD_VECTORs
...t;
> I'm pretty sure the target-independent legalizer does no such thing.
> Can you point to the code you're talking about?
In DAGTypeLegalizer::run(), the loop after the "ScanOperands" label
looks at the operands of the BUILD_VECTOR and the getTypeAction method
returns PromoteInteger (because i8 and i16 are promoted to fit in 32-
bit registers on PPC).
>
>
> That said, I do recall the x86 backend does a similar
> platform-specific transformation with constants... do you care about
> x86 in particular?
>
>> This works fine for SSE, where it appears th...
2009 Feb 02
0
[LLVMdev] type legalizer promoting BUILD_VECTORs
On Mon, Feb 2, 2009 at 11:31 AM, Bob Wilson <bob.wilson at apple.com> wrote:
> LLVM's type legalizer is changing the types of BUILD_VECTORs in a way
> that seems wrong to me, but I'm not sure if this is a bug or if some
> targets may be relying on it.
>
> On a 32-bit target, the default action for legalizing i8 and i16 types
> is to promote them.
This isn't
2013 Aug 01
0
[LLVMdev] PNaCl Bitcode reference manual
Hi Eli,
Recently, I proposed some changes to LLVM to do more lowering of illegal
types (like i128 or i17) and other things within the LLVM IR layer, and the
proposal was roundly rejected by the LLVM community:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-April/061567.html
PNaCl is essentially doing what my proposal described. How do you expect to
reconcile the community's desire to avoid
2014 Mar 05
2
[LLVMdev] A "backend" is ... ?
...useful for any backend that doesn't want to
>>>> implement varargs or by-value calling conventions.
>>>
>>> Why wouldn't these be applicable to existing backends? What is
>>> hard about the existing representations?
And this...
>>>> * PromoteIntegers legalizes integer types (e.g. i30 is
>>>> converted to i32).
>>>
>>> Does it split up too-wide integers? Do we really want another
>>> integer legalization framework in LLVM? I am actually interested
>>> in doing (partial) legalization in the IR du...
2009 Feb 02
4
[LLVMdev] type legalizer promoting BUILD_VECTORs
LLVM's type legalizer is changing the types of BUILD_VECTORs in a way
that seems wrong to me, but I'm not sure if this is a bug or if some
targets may be relying on it.
On a 32-bit target, the default action for legalizing i8 and i16 types
is to promote them. If you then have a BUILD_VECTOR to construct a
legal vector type composed of i8 or i16 values, the type legalizer
will
2014 Mar 05
4
[LLVMdev] Upstreaming PNaCl's IR simplification passes
...>> "insertvalue" and "extractvalue" instructions.
>>
>
> There are already passes that do this outside of function arguments and
> return values. Why is a new one needed? How do you handle the
> overflow-detecting operations?
>
>
>
>> * PromoteIntegers legalizes integer types (e.g. i30 is converted to
>> i32).
>>
>
> Does it split up too-wide integers? Do we really want another integer
> legalization framework in LLVM? I am actually interested in doing (partial)
> legalization in the IR during lowering (codegenprep time...
2013 Jul 30
5
[LLVMdev] PNaCl Bitcode reference manual
Hello,
Following an earlier email (
http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-June/063010.html), we've
published an initial version of the PNaCl bitcode reference manual online -
http://www.chromium.org/nativeclient/pnacl/bitcode-abi. The PNaCl bitcode
is a restricted subset of LLVM IR.
The reference manual is quite terse, so for the bigger picture I'll repost
links to the design
2011 Jun 09
3
[LLVMdev] -fplugin-arg-dragonegg-enable-gcc-optzns status
Current dragonegg svn has all of the -fplugin-arg-dragonegg-enable-gcc-optzns bugs for
usage with -ffast-math -O3 addressed except for those related to PR2314. Using the -fno-tree-vectorize
option, we can evaluate the current state of -fplugin-arg-dragonegg-enable-gcc-optzns with
the Polyhedron 2005 benchmarks compared to stock dragonegg and stock gcc 4.5.4. The runtime
benchmarks below show that