search for: prologepiloginserter

...vc/llvm-project?view=rev&revision=52750 > > Rounding up the stack size does not have to be done if there are no > stack > objects, so that would be the preferred way to fix this. See if this > works for you. > It will be something close to this. > > Index: CodeGen/PrologEpilogInserter.cpp > =================================================================== > --- CodeGen/PrologEpilogInserter.cpp (revision 52829) > +++ CodeGen/PrologEpilogInserter.cpp (working copy) > @@ -464,7 +464,8 @@ > // works. > if (!RegInfo->targetHandlesStackFrameRounding() &a...

...robably this patch: http://llvm.org/viewvc/llvm-project?view=rev&revision=52750 Rounding up the stack size does not have to be done if there are no stack objects, so that would be the preferred way to fix this. See if this works for you. It will be something close to this. Index: CodeGen/PrologEpilogInserter.cpp =================================================================== --- CodeGen/PrologEpilogInserter.cpp (revision 52829) +++ CodeGen/PrologEpilogInserter.cpp (working copy) @@ -464,7 +464,8 @@ // works. if (!RegInfo->targetHandlesStackFrameRounding() && (FFI->hasC...

Running on x86-64 linux: FAIL: test/CodeGen/X86/vec_ins_extract.ll Failed with exit(1) at line 1 while running: llvm-as < test/CodeGen/X86/vec_ins_extract.ll | opt -scalarrepl -instcombine | llc -march=x86 -mcpu=yonah | not grep sub.*esp subl $16, %esp subl $16, %esp subl $16, %esp subl $16, %esp child process exited abnormally FAIL:

...mp;revision=52750 >> >> Rounding up the stack size does not have to be done if there are no >> stack >> objects, so that would be the preferred way to fix this. See if this >> works for you. >> It will be something close to this. >> >> Index: CodeGen/PrologEpilogInserter.cpp >> =================================================================== >> --- CodeGen/PrologEpilogInserter.cpp (revision 52829) >> +++ CodeGen/PrologEpilogInserter.cpp (working copy) >> @@ -464,7 +464,8 @@ >> // works. >> if (!RegInfo->targetHandlesS...

...;> Rounding up the stack size does not have to be done if there are no > >> stack > >> objects, so that would be the preferred way to fix this. See if this > >> works for you. > >> It will be something close to this. > >> > >> Index: CodeGen/PrologEpilogInserter.cpp > >> =================================================================== > >> --- CodeGen/PrologEpilogInserter.cpp (revision 52829) > >> +++ CodeGen/PrologEpilogInserter.cpp (working copy) > >> @@ -464,7 +464,8 @@ > >> // works. > >> i...

Hi all, Virtual ISAs such as WebAssembly and NVPTX use infinite virtual register sets instead of traditional phsyical registers. PrologEpilogInserter is run after register allocation and asserts that all virtuals have been allocated but doesn't otherwise depend on this if scavenging is not needed. We'd like to use the target-independent PEI code for WebAssembly, so we're proposing a TargetRegisterInfo hook for targets to indicate tha...

Hello, after some time I'm trying to build my code with the current CVS of LLVM, and have a problem. The mentioned file, around line 184, contains: if (FixedSlot == FixedSpillSlots+NumFixedSpillSlots) { // Nope, just spill it anywhere convenient. FrameIdx = FFI->CreateStackObject(RegInfo->getSpillSize(Reg)/8,

Vladimir Prus wrote: > What's the division by 8 for? Neither 'CreateStackObject' nor > 'getSpillAlignment' documentation say what units the size is, but > everywhere it's in bytes. In my specific case, 'getSplillAlignment' returns > 4, which becomes 0 after division. Oh, it looks that backends now should specify register size in bits. I've updated

...ograms. as we known, shader programs are short and have less function calls. i found that i have to save/restore callee-saved register(CSR) in prolog and epilog. because I can violate ABI from driver(c code) and shader, i plan to append the attribute 'noreturn' to all shader functions. in PrologEpilogInserter.cpp, you can find that it actually honor an attribute 'naked' which avoid saving CSR. however, it also skips generating stack-pointer adjustment, which i need. my patch is as follows. i am targeting RISC processor. can anyone tell me this patch is generic ? diff --git a/lib/CodeGen/PrologE...

...13 AM Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote: > > I am tempted to think no, we don’t, but I don’t know the use cases. > What post-RA passes with want to run with virtual regs? > > The immediate one that precipitated this mail was PrologEpilogInserter. > However currently the only other pass we have disabled in WebAssemblyTargetMachine is MachineCopyPropagation. > Several passes (post-RA MachineLICM, StackSlotColoring) already only run if RA runs. > Everything else is running today. Currently that's ShrinkWrap, BranchFolder, ExpandP...

...lysis library, fixed some of those errors, but there are more still. Patch is attached for the IVUsers.cpp add to the CMakeLists.txt file. 32> Creating library R:\SDKs\llvm\trunk_VC8_building\lib\Debug\llc.lib and object R:\SDKs\llvm\trunk_VC8_building\lib\Debug\llc.exp 32>LLVMCodeGen.lib(PrologEpilogInserter.obj) : error LNK2001: unresolved external symbol "public: virtual void __thiscall llvm::PEI::getAnalysisUsage(class llvm::AnalysisUsage &)const " (?getAnalysisUsage at PEI@llvm@@UBEXAAVAnalysisUsage at 2@@Z) 32>LLVMCodeGen.lib(PrologEpilogInserter.obj) : error LNK2019: unresolved e...

To fix some problems with how condition registers are saved/restored for PowerPC, I need to override TargetRegisterInfo::hasReservedSpillSlot() in PPCRegisterInfo. I've had some difficulties because of the constness of the function, and I'm wondering what the best way to handle this would be. Essentially I need to add a field to PPCRegisterInfo, and modify that field in

...s previously, but unfortunately only now could try the suggested solution. For reference, here's the original message from me: http://mail.cs.uiuc.edu/pipermail/llvmdev/2004-July/001388.html And here's reply from Chris: http://mail.cs.uiuc.edu/pipermail/llvmdev/2004-July/001390.html The PrologEpilogInserter.cpp file aligns the stack only if MachineFrameInfo::hasCalls returns true, which happens only if the function has "call frame setup instruction" which my backend does not generate. Chris suggested adding explicit MachineFrameInfo::setHasCalls call, which I've tried, but it does not...

I want to check debug output of "PrologEpilogInserter" machine pass, and I have seen in the code that there are various `DEBUG` macros added. However, there is no `-debug` option present for `llc` like it is for `opt`. Closest option I saw after seeing output of `llc --help-list` is `-verify-debug-info` but that does not give any output. Regard...

Hi Evan, Thanks for your feedback! 2009/1/7 Evan Cheng <evan.cheng at apple.com>: > > On Jan 7, 2009, at 2:48 AM, Roman Levenstein wrote: > > > As you can see, PrologEpilogInserter has inserted at the beginning > of the function some code for manipulation of the frame pointer and > this inserted code uses the LR register. > As far as I understand, ARMRegisterInfo.td should exclude the LR > register from the set of allocatable registers for functions that > re...

Does not seem to be a straight error with LLVM itself, but rather the tools, linking issues, here are the errors: Opt: 30> Creating library R:\SDKs\llvm\trunk_VC8_building\lib\Debug\opt.lib and object R:\SDKs\llvm\trunk_VC8_building\lib\Debug\opt.exp 30>LLVMScalarOpts.lib(IndVarSimplify.obj) : error LNK2019: unresolved external symbol "public: bool __thiscall

On Jan 7, 2009, at 2:48 AM, Roman Levenstein wrote: > > > As you can see, PrologEpilogInserter has inserted at the beginning > of the function some code for manipulation of the frame pointer and > this inserted code uses the LR register. > As far as I understand, ARMRegisterInfo.td should exclude the LR > register from the set of allocatable registers for functions that > re...

...> Subject: [llvm-dev] Allowing virtual registers after register >>> allocation >>> >>> >>> Hi all, >>> Virtual ISAs such as WebAssembly and NVPTX use infinite virtual >>> register sets instead of traditional phsyical registers. >>> PrologEpilogInserter is run after register allocation and asserts >>> that all virtuals have been allocated but doesn't otherwise depend >>> on this if scavenging is not needed. We'd like to use the >>> target-independent PEI code for WebAssembly, so we're proposing a >>>...

...conventions > Partly tablegen / partly C++ code. Look for > CodeGen/SelectionDAG/CallingConvLower.cpp, > Target/X86/X86CallingConv.td and around. Usually this code is run > during different phases of sdag lowering. > > 2. Prologue / epilogue. > Pure C++ code. Look into CodeGen/PrologEpilogInserter.cpp (quite > obviously, right?) with bunch of target-specialized hooks, for > example, ones located in Target/X86/X86RegisterInfo.cpp. Information > about this is needed on different stages, some - even before regalloc, > some - in the late end of the codegen. > > Hope this will h...

Hi Jakob, On Thu, Oct 4, 2012 at 1:31 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote: > > On Oct 4, 2012, at 2:47 AM, Madhusudan C.S <madhusudancs at gmail.com> wrote: > > However, I was reading the DeveloperPolicy page and the policy for making > major > changes asks the developers to discuss the work here before proceeding. > So, I am > writing this