Displaying 20 results from an estimated 28 matches for "printoperand".
2018 Dec 06
3
New to LLVM. Need help generating assembly
> On Dec 5, 2018, at 22:15, Tom Stellard via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> On 12/05/2018 07:22 PM, m m via llvm-dev wrote:
>> Hi,
>> I'm new to LLVM and need some help. I defined an instruction to increment the stack pointer by 'amount' (i.e. sp = sp + amount). During assembly generation, the string that gets emitted is "ADS $SP"
2010 Jul 07
0
[LLVMdev] LLC Bug x86 with thread local storage
...h one is correct ?
- movl $tm_nest_level at TPOFF, %ecx
or
- movq $tm_nest_level at TPOFF, %rcx
or
- movl tm_nest_level at TPOFF, %ecx
Otherwise, Is there a way to remove this $ character?
I found that it is here in lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
O << '%' << getRegisterName(Op.getReg());
} else if (Op.isImm()) {
...
} else {
assert(Op....
2010 Jun 22
2
[LLVMdev] LLC Bug x86 with thread local storage
On 06/21/2010 08:21 PM, Eric Christopher wrote:
> On Jun 21, 2010, at 2:56 AM, Patrick Marlier wrote:
>
>
>> Hello,
>>
>> This bug affects all LLVM versions from 2.6 to trunk :
>> http://llvm.org/bugs/show_bug.cgi?id=5081
>>
>> The workaround I found is to add this :
>>
>> Index: lib/Target/X86/X86Instr64bit.td
>>
2010 Jul 07
4
[LLVMdev] LLC Bug x86 with thread local storage
...is initial exec and so from:
http://people.redhat.com/drepper/tls.pdf
it would be movl tm_nest_level at TPOFF, %ecx
> Otherwise, Is there a way to remove this $ character?
>
> I found that it is here in lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
>
> void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
> raw_ostream &O) {
> const MCOperand &Op = MI->getOperand(OpNo);
> if (Op.isReg()) {
> O << '%' << getRegisterName(Op.getReg());
> } else if (Op.isImm()) {
> ...
> } e...
2018 Jun 30
2
Using BuildMI to insert Intel MPX instruction BNDCU failed
...COperand,
void>::operator[](unsigned long) const
/home/shenyouren/workspace/llvm/include/llvm/ADT/SmallVector.h:154:0
#10 0x00000000016b63bb llvm::MCInst::getOperand(unsigned int) const
/home/shenyouren/workspace/llvm/include/llvm/MC/MCInst.h:182:0
#11 0x00000000026695fd llvm::X86ATTInstPrinter::printOperand(llvm::MCInst
const*, unsigned int, llvm::raw_ostream&)
/home/shenyouren/workspace/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp:185:0
#12 0x0000000002664c06
llvm::X86ATTInstPrinter::printInstruction(llvm::MCInst const*,
llvm::raw_ostream&)
/home/shenyouren/workspace/build-llvm/lib/T...
2015 Jul 28
2
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
...b 0x00007fff86d78f1a _sigtramp + 26
4 libsystem_platform.dylib 0x0000000000000002 _sigtramp + 2032693506
5 llvm-mc 0x00000001096a5836 abort + 22
6 llvm-mc 0x00000001096a5811 __assert_rtn + 81
7 llvm-mc 0x000000010963f4e8
llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int,
llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136
8 llvm-mc 0x000000010963eae0
llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*,
llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256
9 llvm-mc 0x000000...
2010 Jul 07
0
[LLVMdev] LLC Bug x86 with thread local storage
...http://people.redhat.com/drepper/tls.pdf
>
> it would be movl tm_nest_level at TPOFF, %ecx
>
>> Otherwise, Is there a way to remove this $ character?
>>
>> I found that it is here in lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
>>
>> void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
>> raw_ostream&O) {
>> const MCOperand&Op = MI->getOperand(OpNo);
>> if (Op.isReg()) {
>> O<< '%'<< getRegisterName(Op.getReg());
>> } else if (Op.isImm())...
2011 Nov 09
1
[LLVMdev] AsmPrinter vs. MCAsmStreamer
...a hard time figuring out the relationship between my XXXAsmPrinter and
MCAsmStreamer. Can someone explain what each is responsible for? Looking at
the existing targets, the XXXAsmPrinter implementations seem to implement
both the legacy "create a .s file" behavior, using
printInstruction/printOperand/etc as well as the newer "lower to MCInst"
behavior (EmitInstruction). Is this just a remnant of the v2.x -> v3.x
transition?
AFAICT, the MCAsmStreamer should be the interface to create the .s file
going forward. Is that true? If true, how does it fit into registering the
asmprinter a...
2012 Mar 26
1
[LLVMdev] Disassembly broken for thumb LDR
...t_addrmode_is4, AddrModeT1_4,
IIC_iLoad_r, IIC_iLoad_i, "ldr",
UnOpFrag<(load node:$Src)>>;
In the generated TableGen output the issue lies around line 4992:
4992 case ARM::tUXTH: printOperand(MI, 1, O); break;
As the operand is not enough in this case.
I'm pretty stuck at the TableGen deciphering to fix the issue. It'll be nice if someone with more llvm skills would check the file and make the required fix.
--
Vladimir Pouzanov
http://www.farcaller.net/
-------------- next...
2018 Feb 07
2
retpoline mitigation and 6.0
...case 'w': // Print HImode register
case 'k': // Print SImode register
case 'q': // Print DImode register
+ case 'V': // Print native register without '%'
if (MO.isReg())
return printAsmMRegister(*this, MO, ExtraCode[0], O);
printOperand(*this, MI, OpNo, O);
--
dwmw2
2009 May 06
0
[LLVMdev] Question on tablegen
...ter, with
operand modifiers.
For example, on x86 there are instructions with ${dst:call} in
their asm string. The "call" part is interpreted as an operand
modifier. The assembly printer looks for the "call" modifier
on MachineOperand::MO_Immediate operands
(in X86ATTAsmPrinter::printOperand), which lets it perform custom
printing for that type of operand. You could use a modifier which
tells the AsmPrinter to print an immediate as the appropriate
letter.
Dan
On May 5, 2009, at 10:23 PM, Manjunath Kudlur wrote:
> Hello,
>
> I am trying to create a machine instruction for &...
2015 Jul 31
2
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
...4 libsystem_platform.dylib 0x0000000000000002 _sigtramp + 2032693506
>> 5 llvm-mc 0x00000001096a5836 abort + 22
>> 6 llvm-mc 0x00000001096a5811 __assert_rtn + 81
>> 7 llvm-mc 0x000000010963f4e8
>> llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int,
>> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136
>> 8 llvm-mc 0x000000010963eae0
>> llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*,
>> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256...
2015 Jul 31
0
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
...tramp + 26
> 4 libsystem_platform.dylib 0x0000000000000002 _sigtramp + 2032693506
> 5 llvm-mc 0x00000001096a5836 abort + 22
> 6 llvm-mc 0x00000001096a5811 __assert_rtn + 81
> 7 llvm-mc 0x000000010963f4e8
> llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int,
> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136
> 8 llvm-mc 0x000000010963eae0
> llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*,
> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256
> 9 llvm-mc...
2011 Nov 20
0
[LLVMdev] How can I output assembly comments from emitPrologue()?
...;XXX"
let Inst{31-0} = 0;
dag OutOperandList = outs;
dag InOperandList = ins;
let AsmString = asmstr;
let Pattern = pattern;
}
2. I then defined a comment instruction, ala:
def COMMENT : FakeInst<(outs), (ins Reg:$fake), "; $fake", []>;
3. I added the following to printOperand(...) in XXXAsmPrinter.cpp:
switch (MO.getType()) {
...
case MachineOperand::MO_Metadata:
O << cast<MDString>(MO.getMetadata()->getOperand(0))->getString();
break;
...
}
4. Finally, whenever I needed to emit comments I call the following:
MDNode* comment =
MDNode::...
2009 May 06
2
[LLVMdev] Question on tablegen
Hello,
I am trying to create a machine instruction for "extractelement". I
want to translate
r <- extractelement v, 0
to
mov r, v.x
I was looking at the dag I can use and I found vector_extract. The
inputs for this SDnode are a register and a iPtr constant. With that,
I need to create 4 separate def's to extract element 0, 1, 2, and 3
and translate to v.x, v.y, v.z, and v.w. I
2009 May 08
2
[LLVMdev] Question on tablegen
...>
> For example, on x86 there are instructions with ${dst:call} in
> their asm string. The "call" part is interpreted as an operand
> modifier. The assembly printer looks for the "call" modifier
> on MachineOperand::MO_Immediate operands
> (in X86ATTAsmPrinter::printOperand), which lets it perform custom
> printing for that type of operand. You could use a modifier which
> tells the AsmPrinter to print an immediate as the appropriate
> letter.
>
> Dan
>
>
> On May 5, 2009, at 10:23 PM, Manjunath Kudlur wrote:
>
>> Hello,
>>
>&...
2011 Nov 20
2
[LLVMdev] How can I output assembly comments from emitPrologue()?
Dear all,
I am looking to output assembly comments in my emitPrologue() function,
just for my own readability. Searching for a way to do this found me this
thread - http://lists.cs.uiuc.edu/pipermail/llvmdev/2011-October/043722.html,
which says that the best way to output comments from somewhere like
emitPrologue() is to:
1. Create an MDString for the comment.
2. Attach it to an LLVM
2015 Jul 31
1
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
...tform.dylib 0x0000000000000002 _sigtramp + 2032693506
>>> 5 llvm-mc 0x00000001096a5836 abort + 22
>>> 6 llvm-mc 0x00000001096a5811 __assert_rtn + 81
>>> 7 llvm-mc 0x000000010963f4e8
>>> llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int,
>>> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136
>>> 8 llvm-mc 0x000000010963eae0
>>> llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*,
>>> llvm::MCSubtargetInfo const&, llvm::raw_ostr...
2009 May 08
0
[LLVMdev] Question on tablegen
...>
> For example, on x86 there are instructions with ${dst:call} in
> their asm string. The "call" part is interpreted as an operand
> modifier. The assembly printer looks for the "call" modifier
> on MachineOperand::MO_Immediate operands
> (in X86ATTAsmPrinter::printOperand), which lets it perform custom
> printing for that type of operand. You could use a modifier which
> tells the AsmPrinter to print an immediate as the appropriate
> letter.
>
> Dan
>
>
> On May 5, 2009, at 10:23 PM, Manjunath Kudlur wrote:
>
>> Hello,
>>
>&...
2018 Feb 07
0
retpoline mitigation and 6.0
...ode register
> case 'k': // Print SImode register
> case 'q': // Print DImode register
> + case 'V': // Print native register without '%'
> if (MO.isReg())
> return printAsmMRegister(*this, MO, ExtraCode[0], O);
> printOperand(*this, MI, OpNo, O);
>
> --
> dwmw2
>
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